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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PIC18F23K22-E/ML датащи(PDF) 16 Page - Microchip Technology |
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PIC18F23K22-E/ML датащи(HTML) 16 Page - Microchip Technology |
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16 / 496 page  PIC18(L)F2X/4XK22 DS41412C-page 16 Preliminary 2010 Microchip Technology Inc. FIGURE 1-1: PIC18(L)F2X/4XK22 FAMILY BLOCK DIAGRAM Instruction Decode and Control Data Latch Data Memory Address Latch Data Address<12> 12 Access BSR FSR0 FSR1 FSR2 inc/dec logic Address 4 12 4 PCH PCL PCLATH 8 31-Level Stack Program Counter PRODL PRODH 8 x 8 Multiply 8 BITOP 8 8 ALU<8> 20 8 8 Table Pointer<21> inc/dec logic 21 8 Data Bus<8> Table Latch 8 IR 12 3 ROM Latch PCLATU PCU Note 1: RE3 is only available when MCLR functionality is disabled. 2: OSC1/CLKIN and OSC2/CLKOUT are only available in select oscillator modes and when these pins are not being used as digital I/O. Refer to Section 2.0 “Oscillator Module (With Fail-Safe Clock Monitor)” for additional information. 3: Full-Bridge operation for PIC18(L)F4XK22, Half-Bridge operation for PIC18(L)F2XK22. EUSART1 Comparators MSSP1 10-bit ADC Timer2 Timer1 CTMU Timer0 CCP4 HLVD ECCP1 BOR Data EEPROM W Instruction Bus <16> STKPTR Bank 8 State machine control signals Decode 8 8 Power-up Timer Oscillator Start-up Timer Power-on Reset Watchdog Timer OSC1(2) OSC2(2) Brown-out Reset Internal Oscillator Fail-Safe Clock Monitor Precision Reference Band Gap MCLR(1) Block LFINTOSC Oscillator 16 MHz Oscillator Single-Supply Programming In-Circuit Debugger SOSCO SOSCI FVR FVR FVR DAC Address Latch Program Memory (8/16/32/64 Kbytes) Data Latch PORTA RA0:RA7 PORTB RB0:RB7 PORTC RC0:RC7 PORTD RD0:RD7 Timer4 Timer6 Timer3 Timer5 SR Latch EUSART2 MSSP2 CCP5 ECCP2(3) C1/C2 ECCP3 PORTE RE0:RE2 RE3(1) DAC |
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