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PIC18F23K22-E/ML датащи(PDF) 55 Page - Microchip Technology

номер детали PIC18F23K22-E/ML
подробное описание детали  28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
PDF  496 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F23K22-E/ML датащи(HTML) 55 Page - Microchip Technology

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 2010 Microchip Technology Inc.
Preliminary
DS41412C-page 55
PIC18(L)F2X/4XK22
TABLE 3-3:
EXIT DELAY ON WAKE-UP BY RESET FROM SLEEP MODE OR ANY IDLE MODE
(BY CLOCK SOURCES)
Clock Source
before Wake-up
Clock Source
after Wake-up
Exit Delay
Clock Ready Status
Bit (OSCCON)
Primary Device Clock
(PRI_IDLE mode)
LP, XT, HS
TCSD(1)
OSTS
HSPLL
EC, RC
HFINTOSC(2)
IOSF
T1OSC or LFINTOSC(1)
LP, XT, HS
TOST(3)
OSTS
HSPLL
TOST + tPLL(3)
EC, RC
TCSD(1)
HFINTOSC(1)
TIOBST(4)
IOSF
HFINTOSC(2)
LP, XT, HS
TOST(4)
OSTS
HSPLL
TOST + tPLL(3)
EC, RC
TCSD(1)
HFINTOSC(1)
None
IOSF
None
(Sleep mode)
LP, XT, HS
TOST(3)
OSTS
HSPLL
TOST + tPLL(3)
EC, RC
TCSD(1)
HFINTOSC(1)
TIOBST(4)
IOSF
Note 1:
TCSD is a required delay when waking from Sleep and all Idle modes and runs concurrently with any other
required delays (see Section 3.4 “Idle Modes”). On Reset, HFINTOSC defaults to 1 MHz.
2:
Includes both the HFINTOSC 16 MHz source and postscaler derived frequencies.
3:
TOST is the Oscillator Start-up Timer. tPLL is the PLL Lock-out Timer.
4:
Execution continues during the HFINTOSC stabilization period, TIOBST.



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