PIC18F23K22-ESLASHML datasheet(70/496 Pages) MICROCHIP

70 / 496 page

PIC18(L)F2X/4XK22

DS41412C-page 70

Preliminary

 2010 Microchip Technology Inc.

FIGURE 5-1:

PROGRAM MEMORY MAP AND STACK FOR PIC18(L)F2X/4XK22 DEVICES

5.1.1

PROGRAM COUNTER

The Program Counter (PC) specifies the address of the

instruction to fetch for execution. The PC is 21 bits wide

and is contained in three separate 8-bit registers. The

low byte, known as the PCL register, is both readable

and writable. The high byte, or PCH register, contains

the PC<15:8> bits; it is not directly readable or writable.

Updates to the PCH register are performed through the

PCLATH register. The upper byte is called PCU. This

directly readable or writable. Updates to the PCU

The contents of PCLATH and PCLATU are transferred

to the program counter by any operation that writes

PCL. Similarly, the upper two bytes of the program

counter are transferred to PCLATH and PCLATU by an

operation that reads PCL. This is useful for computed

offsets to the PC (see Section 5.1.4.1 “Computed

GOTO”).

The PC addresses bytes in the program memory. To

prevent the PC from becoming misaligned with word

instructions, the Least Significant bit of PCL is fixed to

a value of ‘0’. The PC increments by 2 to address

sequential instructions in the program memory.

The CALL, RCALL, GOTO and program branch

instructions write to the program counter directly. For

these instructions, the contents of PCLATH and

PCLATU are not transferred to the program counter.

5.1.2

RETURN ADDRESS STACK

The return address stack allows any combination of up

to 31 program calls and interrupts to occur. The PC is

pushed onto the stack when a CALL or RCALL

instruction is executed or an interrupt is Acknowledged.

The PC value is pulled off the stack on a RETURN,

RETLW or a RETFIE instruction. PCLATU and PCLATH

are not affected by any of the RETURN or CALL

instructions.

The stack operates as a 31-word by 21-bit RAM and a

5-bit Stack Pointer, STKPTR. The stack space is not

part of either program or data space. The Stack Pointer

is readable and writable and the address on the top of

the stack is readable and writable through the Top-of-

Stack (TOS) Special File Registers. Data can also be

pushed to, or popped from the stack, using these

registers.

PC<20:0>

Stack Level 1



Stack Level 31

Reset Vector

Low Priority Interrupt Vector



CALL,RCALL,RETURN

RETFIE,RETLW

0000h

0018h

On-Chip

Program Memory

High Priority Interrupt Vector

0008h

1FFFFFh

4000h

3FFFh

Read ‘0’

200000h

8000h

7FFFh

On-Chip

Program Memory

Read ‘0’

1FFFh

2000h

On-Chip

Program Memory

Read ‘0’

PIC18(L)F25K22

PIC18(L)F45K22

PIC18(L)F24K22

PIC18(L)F44K22

PIC18(L)F23K22

PIC18(L)F43K22

Read ‘0’

FFFFh

PIC18(L)F26K22

PIC18(L)F46K22

On-Chip

Program Memory

10000h

PIC18F23K22-E/ML датащи(PDF) 70 Page - Microchip Technology

PIC18F23K22-E/ML датащи(HTML) 70 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL