PIC18F23K22-ESLASHML datasheet(32/496 Pages) MICROCHIP

32 / 496 page

PIC18(L)F2X/4XK22

DS41412C-page 32

Preliminary

 2010 Microchip Technology Inc.

OSCCON: OSCILLATOR CONTROL REGISTER

R/W-0

R/W-1

R-q

R-0

R/W-0

IDLEN

IRCF<2:0>

OSTS(1)

HFIOFS

SCS<1:0>

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

q = depends on condition

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

IDLEN: Idle Enable bit

1 = Device enters Idle mode on SLEEP instruction

0 = Device enters Sleep mode on SLEEP instruction

bit 6-4

IRCF<2:0>: Internal RC Oscillator Frequency Select bits(2)

111 = HFINTOSC – (16 MHz)

110 = HFINTOSC/2 – (8 MHz)

101 = HFINTOSC/4 – (4 MHz)

100 = HFINTOSC/8 – (2 MHz)

011 = HFINTOSC/16 – (1 MHz)(3)

If INTSRC = 0 and MFIOSEL = 0:

010 = HFINTOSC/32 – (500 kHz)

001 = HFINTOSC/64 – (250 kHz)

000 = LFINTOSC – (31.25 kHz)

If INTSRC = 1 and MFIOSEL = 0:

010 = HFINTOSC/32 – (500 kHz)

001 = HFINTOSC/64 – (250 kHz)

000 = HFINTOSC/512 – (31.25 kHz)

If INTSRC = 0 and MFIOSEL = 1:

010 = MFINTOSC – (500 kHz)

001 = MFINTOSC/2 – (250 kHz)

000 = LFINTOSC – (31.25 kHz)

If INTSRC = 1 and MFIOSEL = 1:

010 = MFINTOSC – (500 kHz)

001 = MFINTOSC/2 – (250 kHz)

000 = MFINTOSC/16 – (31.25 kHz)

bit 3

OSTS: Oscillator Start-up Time-out Status bit

1 = Device is running from the clock defined by FOSC<3:0> of the CONFIG1H register

0 = Device is running from the internal oscillator (HFINTOSC, MFINTOSC or LFINTOSC)

bit 2

HFIOFS: HFINTOSC Frequency Stable bit

1 = HFINTOSC frequency is stable

0 = HFINTOSC frequency is not stable

bit 1-0

SCS<1:0>: System Clock Select bit

1x = Internal oscillator block

01 = Secondary (SOSC) oscillator

00 = Primary clock (determined by FOSC<3:0> in CONFIG1H).

Note 1:

Reset state depends on state of the IESO Configuration bit.

INTOSC source may be determined by the INTSRC bit in OSCTUNE and the MFIOSEL bit in OSCCON2.

Default output frequency of HFINTOSC on Reset.

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