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PIC18F23K22-E/ML датащи(PDF) 134 Page - Microchip Technology

номер детали PIC18F23K22-E/ML
подробное описание детали  28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
PDF  496 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F23K22-E/ML датащи(HTML) 134 Page - Microchip Technology

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PIC18(L)F2X/4XK22
DS41412C-page 134
Preliminary
 2010 Microchip Technology Inc.
TABLE 10-1:
PORTA I/O SUMMARY
Pin Name
Function
TRIS
Setting
ANSEL
Setting
Pin
Type
Buffer
Type
Description
RA0/C12IN0-/AN0
RA0
01
O
DIG
LATA<0> data output; not affected by analog input.
10
I
TTL
PORTA<0> data input; disabled when analog input
enabled.
C12IN0-
11
I
AN
Comparators C1 and C2 inverting input.
AN0
11
I
AN
Analog input 0.
RA1/C12IN1-/AN1
RA1
01
O
DIG
LATA<1> data output; not affected by analog input.
10
I
TTL
PORTA<1> data input; disabled when analog input
enabled.
C12IN1-
11
I
AN
Comparators C1 and C2 inverting input.
AN1
11
I
AN
Analog input 1.
RA2/C2IN+/AN2/
DACOUT/VREF-
RA2
01
O
DIG
LATA<2> data output; not affected by analog input; disabled
when DACOUT enabled.
10
I
TTL
PORTA<2> data input; disabled when analog input
enabled; disabled when DACOUT enabled.
C2IN+
11
I
AN
Comparator C2 non-inverting input.
AN2
11
I
AN
Analog output 2.
DACOUT
x1
O
AN
DAC Reference output.
VREF-
11
I
AN
A/D reference voltage (low) input.
RA3/C1IN+/AN3/
VREF+
RA3
01
O
DIG
LATA<3> data output; not affected by analog input.
10
I
TTL
PORTA<3> data input; disabled when analog input enabled.
C1IN+
11
I
AN
Comparator C1 non-inverting input.
AN3
11
I
AN
Analog input 3.
VREF+
11
I
AN
A/D reference voltage (high) input.
RA4/CCP5/
C1OUT/SRQ/
T0CKI
RA4
01
O
DIG
LATA<4> data output.
10
I
TTL
PORTA<4> data input; default configuration on POR.
CCP5
01
O
DIG
CCP5 Compare output/PWM output, takes priority over
RA4 output.
10
I
ST
Capture 5 input/Compare 5 output/ PWM 5 output.
C1OUT
01
O
DIG
Comparator C1 output.
SRQ
01
O
DIG
SR Latch Q output; take priority over CCP 5 output.
T0CKI
10
I
ST
Timer0 external clock input.
RA5/C2OUT/
SRNQ/SS1/
HLVDIN/AN4
RA5
01
O
DIG
LATA<5> data output; not affected by analog input.
10
I
TTL
PORTA<5> data input; disabled when analog input enabled.
C2OUT
01
O
DIG
Comparator C2 output.
SRNQ
1
O
DIG
SR Latch Q output.
SS1
10
I
TTL
SPI slave select input (MSSP1).
HLVDIN
11
I
AN
High/Low-Voltage Detect input.
AN4
11
I
AN
A/D input 4.
Legend:
AN = Analog input or output; TTL = TTL compatible input; HV = High Voltage; OD = Open Drain; XTAL = Crystal; CMOS
= CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels; I2CTM
= Schmitt Trigger input with
I2C.



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