PIC18F23K22-ESLASHML datasheet(18/496 Pages) MICROCHIP

18 / 496 page

PIC18(L)F2X/4XK22

DS41412C-page 18

Preliminary

 2010 Microchip Technology Inc.

RA7/CLKI/OSC1

RA7

I/O

TTL

Digital I/O.

CLKI

CMOS External clock source input. Always associated with pin

function OSC1.

OSC1

Oscillator crystal input or external clock source input ST

buffer when configured in RC mode; CMOS otherwise.

RB0/INT0/CCP4/FLT0/SRI/SS2/AN12

RB0

I/O

TTL

Digital I/O.

INT0

External interrupt 0.

CCP4

I/O

Capture 4 input/Compare 4 output/PWM 4 output.

FLT0

PWM Fault input for ECCP Auto-Shutdown.

SRI

SR Latch input.

SS2

TTL

SPI slave select input (MSSP2).

AN12

Analog Analog input 12.

RB1/INT1/P1C/SCK2/SCL2/C12IN3-/AN10

RB1

I/O

TTL

Digital I/O.

INT1

External interrupt 1.

P1C

CMOS Enhanced CCP1 PWM output.

SCK2

I/O

Synchronous serial clock input/output for SPI mode

(MSSP2).

SCL2

I/O

Synchronous serial clock input/output for I2C™ mode

(MSSP2).

C12IN3-

Analog Comparators C1 and C2 inverting input.

AN10

Analog Analog input 10.

RB2/INT2/CTED1/P1B/SDI2/SDA2/AN8

RB2

I/O

TTL

Digital I/O.

INT2

External interrupt 2.

CTED1

CTMU Edge 1 input.

P1B

CMOS Enhanced CCP1 PWM output.

SDI2

SPI data in (MSSP2).

SDA2

I/O

I2C™ data I/O (MSSP2).

AN8

Analog Analog input 8.

RB3/CTED2/P2A/CCP2/SDO2/C12IN2-/AN9

RB3

I/O

TTL

Digital I/O.

CTED2

CTMU Edge 2 input.

P2A

CMOS Enhanced CCP2 PWM output.

CCP2(2)

I/O

Capture 2 input/Compare 2 output/PWM 2 output.

SDO2

—

SPI data out (MSSP2).

C12IN2-

Analog Comparators C1 and C2 inverting input.

AN9

Analog Analog input 9.

TABLE 1-2:

PIC18(L)F2XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)

Pin Number

Pin Name

Type

Buffer

Type

Description

PDIP,

SOIC

QFN,

UQFN

Legend:

TTL = TTL compatible input CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;

I = Input; O = Output; P = Power.

Note 1:

Default pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and

CCP2MX are set.

Alternate pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and

CCP2MX are clear.

PIC18F23K22-E/ML датащи(PDF) 18 Page - Microchip Technology

PIC18F23K22-E/ML датащи(HTML) 18 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL