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TMPR4955AF датащи(PDF) 138 Page - Toshiba Semiconductor |
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TMPR4955AF датащи(HTML) 138 Page - Toshiba Semiconductor |
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138 / 168 page ![]() Chapter 7 JTAG Interface 7-4 7.3.2 Bypass Register The Bypass register is 1 bit wide. When the TAP controller is in the Shift-DR (Bypass) state, the data on the JTDI pin is shifted into the Bypass register, and the Bypass register output shifts to the JTDO output pin. In essence, the Bypass register is a short-circuit which allows bypassing of board-level devices, in the serial boundary-scan chain, which are not required for a specific test. The logical location of the Bypass register in the boundary-scan chain is shown in Figure 7.3.3. Use of the Bypass register speeds up access to boundary-scan registers in those ICs that remain active in the board-level test datapath. Figure 7.3.3 Bypass Register Operation JTDO Board input IC package Board JTDI Bypass register Boundary-scan register pad cell Board output JTDI JTDI JTDO JTDO JTDO JTDI JTDO JTDI |
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