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TMPR4955AF датащи(PDF) 74 Page - Toshiba Semiconductor

номер детали TMPR4955AF
подробное описание детали  64-Bit TX System RISC TX49 Family
PDF  168 Pages
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производитель  TOSHIBA [Toshiba Semiconductor]
домашняя страница  http://www.semicon.toshiba.co.jp/eng
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TMPR4955AF датащи(HTML) 74 Page - Toshiba Semiconductor

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Chapter 6 TX4955A System Interface
6-2
6.2.1
Interface bus
Figure 6.2.1 illustrates the 32-bit address/data bus SysAD (31:0), which is the main
communication bus of the system interface, and the 9-bit command bus SysCmd (8:0).
SysAD and SysCmd are bi-directional busses. In other words, these two busses are used for
the processor to issue processor requests and for the external agent to issue external
requests.
Figure 6.2.1 System Interface Bus
Requests sent via the system interface consist of the following:
Address
System interface command that strictly specifies the type of request
Series of data elements for when the request is a particular write or read process.
6.2.2
Address cycle and data cycle
Cycles during which valid addresses exist on the SysAD bus are referred to as address
cycles. Also, cycles during which valid data exist on the SysAD bus are referred to as data
cycles. Validity is determined depending on the ValidIn signals and ValidOut signals.
The SysCmd bus is used to identify the contents of the SysAD bus for all cycles at which
it is to be valid. The most significant bit of the SysCmd bus is used to indicate whether the
current cycle is an address cycle or a data cycle.
In the case of an address cycle [SysCmd(8) = 0], the remaining bits SysCmd(7:0) of
the SysCmd bus contain the system interface commands.
In the case of a data cycle [SysCmd(8) = 1], the remaining bits SysCmd(7:0) of the
SysCmd bus contain the data identifier.
SysCmd (8:0)
SysAD (31:0)
TX4955A
External agent



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