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TMPR4955AF датащи(PDF) 60 Page - Toshiba Semiconductor |
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TMPR4955AF датащи(HTML) 60 Page - Toshiba Semiconductor |
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60 / 168 page ![]() Chapter 4 Clock Interface 4-4 4.3 Connecting Clocks to a Phase-Locked System When the processor is used in a phase-locked system, the external agent must phase lock its operation to a common MasterClock MasterClock MasterClock MasterClock. In such a system, the delivery of data and data sampling have common characteristics, even if the components have different delay values. For example, transmission time (the amount of time a signal takes to move from one component to another along a trace on the board) between any two components A and B of a phase-locked system can be calculated from the following equation: Transmission Time = (SClock period) − (tDO for A) − (tDS for B) − (Clock Jitter for A Max) − (Clock Jitter for B Max) Figure 4.3.1 shows a block-level diagram of a phase-locked system using the TX4955A processor. MasterClock External Agent TX4955A MasterClock SysCmd SysAD SysAD MasterClock SysCmd Figure 4.3.1 The TX4955A Processor Phase-Locked System |
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