TMPR4955AF datasheet(94/168 Pages) TOSHIBA

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Chapter 6 TX4955A System Interface

6-22

6.2.8.11 Read response protocol

The external agent must use the read response protocol to return data to the

processor if a processor read request has been received. The sequence of the read

response protocol is as follows.

1. The external agent waits for the processor to automatically execute a shift into the

slave state.

2. The external agent uses either a single data cycle or a series of data cycles to

return data.

3. After issuing the final data cycle, the read response ends, then the external agent

sets the SysCmd and SysAD busses to tri-state.

4. The system interface returns to the master state.

Note: After issuing a read response, the processor automatically shifts to the slave state.

5. Data identifiers of a data cycle must indicate that the data are response data.

6. Final data cycle identifiers must contain an indication that a cycle is the final data

cycle.

In the case of read responses to non-coherent block read requests, it is not

necessary for the response data to check the initial cache state. The cache state is

automatically set to exclusively dirty.

Data identifiers of data cycles can send notification of transfer data errors in those

cycles. The external agent must return data blocks with the correct size even

when there is an error in the data. Whether there is a single error or multiple

errors in the read response data cycles, the processor processes them as bus

errors.

Read responses must always be returned to the processor when a processor read

request is being held. Processor operation is not defined if a read response was

returned in a state where there were no processor read requests on hold.

Figure 6.2.22 illustrates a processor word read request and the subsequent word

read response. Also, Figure 6.2.23 illustrates the read response to a processor block

read request when the system interface is in the slave state.

Note: The SysADC bus and SysCmdP bus timing is the same as the SysAD bus and

SysCmd timing, respectively.

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