MPC821 datasheet(156/242 Pages) NXP

156 / 242 page

Support Information

MPC8XXFADS Design Specification—Rev 0.1

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

These three input lines determine the slave address of the MPC8XXFADS being accessed

by the host computer. Up to 8 boards can be addressed by one ADI board.

•

ADS_SRESET - ’I’

This input line is used to generate Soft Reset for the MPC. When an ads is selected and

this line is asserted by the host computer, Soft Reset will be generated to the MPC along

with the Soft Reset configuration applied during that sequence.

•

HOST_ENABLE~ - ’I’

This line is always driven low by the ADI board. When an ADI is connected to the

MPC8XXFADS, this signals enabled the operation of the debug port controller. Otherwise

the debug port controller is disabled and its outputs are tri-stated.

•

ADS_HRESET - ’I’

When a host is connected, this line is used in conjunction with the addressing lines to gen-

erate a Hard Reset to the MPC8XXFADS board. When this signal is driven in conjunction

with the ADS_SRESET signal, the ADI I/F state machines and registers are reset.

•

HOST_REQ -’I’

This signal initiates a host to MPC8XXFADS write cycle.

•

ADS_ACK - ’O’

This signal is the MPC8XXFADS response to the HOST_REQ signal, indicating that the

board has detected the assertion of HOST_REQ.

•

ADS_REQ - ’O’

This signal initiates an MPC8XXFADS to host write cycle.

•

HST_ACK - ’I’

This signal serves as the host’s response to the ADS_REQ signal.

•

HOST_VCC - ’I’ (three lines)

These lines are power lines from the host computer. In the MPC8XXFADS, these lines are

used by the hardware to determine if the host computer is powered on.

•

PD(0:7) - ’I/O’

These eight I/O lines are the parallel data bus. This bus is used to transmit and receive data from the

host computer.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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