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MPC821 датащи(PDF) 38 Page - NXP Semiconductors

номер детали MPC821
подробное описание детали  Design Specification
PDF  242 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
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Functional Description
MPC8XXFADS Design Specification—Rev 0.1
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
4•7
Flash Memory SIMM
The MPC8XXFADS is provided with 2Mbyte of 90 nsec flash memory SIMM - the MCM29020 by Mo-
torola. Support is given also to 4MBytes MCM29F040, 8 MBytes MCM29F080, 4 MBytes SM73218
and to 8 MBytes SM73228 by Smart Technology. The Motorola SIMMs are internally composed of 1,
2 or 4 banks of 4 Am29F040 compatible devices, while the Smart SIMMs are arranged as 1 or 2
banks of four 28F008 devices by Intel. The flash SIMM resides on an 80 pin SIMM socket.
To minimize use of MPC’s chip-select lines, only one chip-select line (CS0~) is used to select the
flash as a whole, while distributing chip-select lines among the internal banks is done via on-board
programmable logic, according to the Presence-Detect lines of the Flash SIMM inserted to the FADS.
FIGURE 4-3 Flash Memory SIMM Architecture
The access time of the Flash memory provided with the FADS is 90 nsec, however, 120 nsec devices
may be used as well. Reading the delay section of the Flash SIMM Presence-Detect lines, the
debugger establishes (via OR0) the correct number of wait-states (considering 50MHz system clock
frequency).
The Motorola SIMMs are built of AMD’s Am29F0X0 devices which are 5V programmable, i.e., there
is no need for external programming voltage and the flash may be written almostA as a regular
memory.
The SMART parts however, require 12V
± 0.5% programming voltage to be applied for programming.
If on-boards programming of such device is required, a 12V supply needs to be connected to the
FADS (P7). Otherwise, for normalB Flash operation, 12V supply is not required.
The control over the flash is done using the GPCM and a dedicated CS0~ region, controlling the
whole bank. During hard - reset initializations, the debugger reads the Flash Presence-Detect lines
via BCSR2 and decides how to program BR0 & OR0 registers, within which the size and the delay of
the region are determined.
A. A manufacturer specific dedicated programming algorithm should be implemented during flash program-
ming.
B. I.e., Read-Only.
M29F040 or
M29F040 or
M29F040 or
M29F040 or
M29F040 or
M29F040 or
M29F040 or
M29F040 or
M29F040
M29F040
M29F040
M29F040
M29F040
M29F040
M29F040
M29F040
MCM29F020
MCM29F040
MCM29F080
ADD
DATA
F_CS1~
F_CS2~
F_CS3~
F_CS4~
Flash Presence-Detect Lines
CS0~
1M X 8
1M X8
1M X 8
1M X 8
1M X 8
1M X 8
1M X 8
1M X 8
SM73218
SM73228
FADS’s
Logic
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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