MPC821 datasheet(55/242 Pages) NXP

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MPC821 датащи(PDF) 55 Page - NXP Semiconductors

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Functional Description

MPC8XXFADS Design Specification—Rev 0.1

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

WARNING

Since EXTOLI(0:3) lines may be DRIVEN LOW (’0’)

by the dip-switch, OFF-BOARD tools should NEV-

ER DRIVE them HIGH. Failure in doing so, might re-

sult in PERMANENT DAMAGE to the FADS and / or

to OFF-BOARD logic.

4•11•5

BCSR3 - Board Control / Status Register 3

BCSR3 is an additional control / status register which may be accessed at offset 0xC from BCSR

base address. BCSR3 gets its defaults during Power-On reset and may be read or written at any time.

TABLE 4-18. MPC8XXFADS Daughter Boards’ Revision Encoding

Revision Number (0:3)

[Hex]

MPC8XXFADS

Daughter Board Revision

ENG (Engineering)

PILOT

2 - 7

Reserved

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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