MPC821 datasheet(59/242 Pages) NXP

59 / 242 page

Functional Description

MPC8XXFADS Design Specification—Rev 0.1

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

4•12

Debug Port Controller

The debug port of the MPC8XXFADS is implemented on-board, connected to the MPC via the JTAGA

port. Since the locationB of the debug port is determined via the Hard-Reset configuration, It is impor-

tant that the relevant configuration bits (see 4•1•6 "Reset Configuration" on page 29) are not changed,

if working with the local debug port is desired.

The debug port controller is interfaced to host computer via Motorola’s ADI port, which is an 8-bit wide

parallel port. Since the debug port is serial, conversion is done by hardware between the parallel and

serial protocols.

The MPC’s debug port is configured at SOFT-Reset to "Asynchronous Clock Mode" i.e., the debug

port generates the debug clock - DSCK, which is asynchronous with the MPC system clock.

The debug port controller block diagram is shown in FIGURE 4-7 "Debug Port Controller Block

Diagram" on page 58.

a. Shaded areas are additions with respect to the MPC8XXFADS.

b. MPC823 Daughter Board function.

c. MPC860SAR Daughter Board function.

d. MPC860T Daughter Board function.

e. I.e., on the negative edge.

A. The debug port location is determined by the HARD - Reset configuration.

B. In terms of MPC pins.

VDO_EXT_CLK_

Video Port Clock Enable. When this signal is active (high), it enables an

on-board 27MHz clock generator as a source for both the video encoder

and the video port controller of the MPC823.

The system programmer should avoid asserting this signal, until it is

assured that the MPC823 is set to accept external video clock. Failure in

doing so might result in permanent damage to the MPC823 and / or the on-

board 27 MHz clock generator.

This signal has no function with any daughter board other the MPC823

daughter board.

R,W

VIDEO_RST

Video Port Reset. when this active (low) signal is beinge asserted, the

Video Encoder, located on the MPC823FADSDB, is being reset. For further

informations

see

2•4

"VIDEO

Support"

page

the

MPC823FADSDB spec.

This signal has no function with any daughter board other the MPC823

daughter board

R,W

MODEM_EN

Modem Enable for MPC823. When this signal is active (low) while an

MPC823FADSDB is connected to the FADS, it is possible to operate the

MPC821 Modem Tool. This signal has no function with any other daughter

board.

R,W

DATA_VOICE

Modem Tool Function Select. Effective only with MPC823AFDSDB. When

This signal is high, the DATA function of the modem tool is selected. When

low, the VOICE function of the modem tool is selected.

R,W

13 - 31

Reserved

Un-implemented

TABLE 4-23. BCSR4 Descriptiona

BIT

MNEMONIC

Function

PON

DEF

ATT.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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