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MPC821 датащи(PDF) 87 Page - NXP Semiconductors |
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MPC821 датащи(HTML) 87 Page - NXP Semiconductors |
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87 / 242 page ![]() Support Information MPC8XXFADS Design Specification—Rev 0.1 PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE "* Reset MPC8XX. (Connected to MPC8XX hard and reset inputs) Asynchronous. * "****************************************************************************** equations !PdaHardReset~ = H; PdaHardReset~.oe = PdaHardResetEn; "open-drain PdaHardResetEn = ADS_IS_SELECTED & (AdsHardReset==ADS_HARD_RESET_ACTIVE); !PdaSoftReset~ = H; PdaSoftReset~.oe = PdaSoftResetEn; "needs to be open-drain PdaSoftResetEn = ADS_IS_SELECTED & (AdsSoftReset==ADS_SOFT_RESET_ACTIVE ); "****************************************************************************** "****************************************************************************** "* Clock generator. "* All i/f logic works on IClk, which is driven externally by the output "* of DbgClk divider. "* The debug clock divider is a 3 bit free-running counter, outputs of which "* control a 4:1 mux, output of which drives IClk (externally). "* Since mux control may change on the fly, a protection logic by means of "* 2 bit register is provided, so that mux control is allowed to change "* only when all divider outputs are high which assures a falling edge prior "* to a rising edge. "* Clk2 is infact the source for DSCK and is available outside for debug "* purpose. "****************************************************************************** equations DbgClkDiv.clk = DbgClk; DbgClkDiv := DbgClkDiv.fb + 1; " free running counter. "****************************************************************************** "* Clock Safe Transition Register. (CSTR) "* The goal of this register is to provide safe clock transitions, i.e., that "* a trasition will not cause races over the clockout. E.g., in a transition "* between divide by 1 and divide by any bigger order, a possible race may "* occur since the divided outputs are delayed with respect to DbgClk. "* Therefore, a safe transition may be performed only when all clocks are LOW. "****************************************************************************** Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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