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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DA16200 датащи(PDF) 104 Page - Renesas Technology Corp |
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DA16200 датащи(HTML) 104 Page - Renesas Technology Corp |
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104 / 154 page  DA16200 Ultra Low Power Wi-Fi SoC Datasheet Revision 3.6 04-Jan-2023 CFR0011-120-00 104 of 153 © 2023 Renesas Electronics Bit Mode Symbol Description Reset 3'h2: FNPLL 1/4 3'h3: FNPLL 1/8 10.4 SDeMMC Register The SD/eMMC host IP provides the function for DA16200 to access SD or eMMC cards. This SD/eMMC host IP only supports a 4-bit data bus and the maximum clock rate is 50 MHz. Address Register Description Common control for SDeMMC Pin Status 0x5003_0000 HIF_CTRL0 I2S Control Register 0 0x5003_0004 HIF_EVNT_CTRL I2S Control Register 1 0x5003_0008 HIF_INT_CTRL I2S Data Register 0x5003_000C HIF_CLK_CNT_CTRL I2S Status Register 0x5003_0010 HIF_CMD_ARG 0x5003_0014 HIF_CMD_IDX I2S Interrupt Mask Register 0x5003_0018 HIF_CMD_ARGQ 0x5003_001C HIF_CND_IDXQ 0x5003_0020 HIF_PAD_CTRL I2S Rx Overrun Interrupt Clear Register 0x5003_0024 HIF_BLK_LG I2S DMA Enable Register 0x5003_0028 HIF_BLK_CNT 0x5003_002C Reserved 0x5003_0030 HIF_RSP_TMO_CNT 0x5003_0034 HIF_RD_TMO_CNT 0x5003_0038 HIF_WB_TMO_CNT 0x5003_003C HIF_RSP_CIX_ST 0x5003_0040 HIF_RSP_ARG_0 0x5003_0044 HIF_RSP_ARG_1 0x5003_0048 HIF_RSP_ARG_2 0x5003_004C HIF_RSP_ARG_3 0x5003_0050 HIF_AHB_SA 0x5003_0054 HIF_AHB_EA 0x5003_0058 Reserved 0x5003_005C Reserved 0x5003_0060 HIF_BUS_ST 0x5003_0064 HIF_SM_ST 0x5003_0068 HIF_XTR_CNT 0x5003_006C HIF_ERR_CNT |
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