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DA16200 датащи(PDF) 103 Page - Renesas Technology Corp

номер детали DA16200
подробное описание детали  Ultra Low Power Wi-Fi SoC
PDF  154 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

DA16200 датащи(HTML) 103 Page - Renesas Technology Corp

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DA16200
Ultra Low Power Wi-Fi SoC
Datasheet
Revision 3.6
04-Jan-2023
CFR0011-120-00
103 of 153
© 2023 Renesas Electronics
Table 150: I2S_STATUS (0x4001_400C)
Bit
Mode
Symbol
Description
Reset
5:0
R
Status
[5]: Rx FIFO Not Empty
[4]: Rx FIFO Full
[2]: BUSY
[1]: Tx FIFO Not FULL
[0]: Tx FIFO EMPTY
Table 151: I2S_IMASK (0x4001_4014)
Bit
Mode
Symbol
Description
Reset
3
R/W
TXIM
Tx FIFO Interrupt DMA TX request Mask
When TX FIFO arrives at half size.
1 = Enable
0 = Disable
1'b0
2
R/W
RXIM
Rx FIFO Interrupt DMA RX request Mask
When RX FIFO arrives at half size.
1 = Enable
0 = Disable
1'b0
1
R/W
RTIM
Rx Receive Timeout Interrupt Mask
1 = Enable
0 = Disable
Reserved. Not used.
1'b0
0
R/W
RORIM
Rx Over Run Interrupt DMA RX request Mask
When RX FIFO arrives at full size.
1 = Enable
0 = Disable
1'b0
Table 152: I2S_ICR (0x4001_4020)
Bit
Mode
Symbol
Description
Reset
0
R/W
RORIC
Rx Over Run Interrupt DMA RX request Clear
1'b0
Table 153: I2S_DMACR (0x4001_4024)
Bit
Mode
Symbol
Description
Reset
1
R/W
TXDMAE
Tx DMA Enable
1 = Enable
0 = Disable
1'b0
0
R/W
RXDMAE
Rx DMA Enable
1 = Enable
0 = Disable
1'b0
Table 154: I2S_CLK_SEL (0x5000_1314)
Bit
Mode
Symbol
Description
Reset
2:0
R/W
-
FNPLL frequency divider factor register
3'h0: no clock
3'h1: FNPLL 1/2
3'b000



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