CS47L35 datasheet(187/300 Pages) CIRRUS

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DS1085F3

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CS47L35

4.16 Clocking and Sample Rates

4.16.2 Sample-Rate Control

The CS47L35 audio signal paths are synchronized to the SYSCLK system clock.

Different sample rates may be selected for each of the audio interfaces (AIF1, AIF2, AIF3, SLIMbus), and for the input

(ADC) and output (DAC) paths, but each enabled interface must still be synchronized to SYSCLK.

The CS47L35 can support a maximum of three different sample rates at any time. The supported sample rates range from

8kHz to 192kHz.

The applicable sample rates are selected using SAMPLE_RATE_1, SAMPLE_RATE_2 and SAMPLE_RATE_3. These

must each be numerically related to each other and to the SYSCLK frequency (further details of these requirements are

provided in Table 4-92 and the accompanying text).

Each of the audio interfaces, input paths, and output paths is associated with one of the sample rates selected by the

SAMPLE_RATE_n fields.

Note that, when any of the SAMPLE_RATE_n fields is written to, the activation of the new setting is automatically

synchronized by the CS47L35 to ensure continuity of all active signal paths. The SAMPLE_RATE_n_STS bits provide

indication of the sample rate selections that have been implemented.

The following restrictions must be observed regarding the sample-rate control configuration:

• All external clock references (MCLK input or Slave Mode AIF input) must be within 1% of the applicable register

field settings.

• The input (ADC/DMIC) sample rate is valid from 8–192 kHz. If 384- or 768-kHz DMIC clock rate is selected on any

of the input paths, the supported sample rate is valid only up to 48 or 96 kHz respectively.

• The S/PDIF sample rate is valid from 32–192 kHz.

• The isochronous sample-rate converters (ISRCs) support sample rates 8–192 kHz. For each ISRC, the higher

sample rate must be an integer multiple of the lower rate.

4.16.3 Automatic Sample-Rate Detection

The CS47L35 supports automatic sample-rate detection on the digital audio interfaces (AIF1–AIF3). Note that this is only

possible when the respective interface is operating in Slave Mode (i.e., when LRCLK and BCLK are inputs to the

CS47L35).

Automatic sample-rate detection is enabled by setting RATE_EST_ENA. The LRCLK input pin selected for sample-rate

detection is set using LRCLK_SRC.

As many as four audio sample rates can be configured for automatic detection; these sample rates are selected using the

SAMPLE_RATE_DETECT_n fields. Note that the function only detects sample rates that match one of the SAMPLE_

RATE_DETECT_n fields.

If one of the selected audio sample rates is detected on the selected LRCLK input, the control-write sequencer is triggered.

A unique sequence of actions may be programmed for each of the detected sample rates. Note that the applicable control

sequences must be programmed by the user for each detection outcome; see Section 4.18.

The TRIG_ON_STARTUP bit controls whether the sample-rate detection circuit responds to the initial detection of the

applicable interface (i.e., when the AIFn interface starts up).

• If TRIG_ON_STARTUP = 0, the detection circuit only responds (i.e., trigger the control-write sequencer) to a

change in the detected sample rate—the initial sample-rate detection is ignored. (Note that the initial sample-rate

detection is the first detection of a sample rate that matches one of the SAMPLE_RATE_DETECT_n fields.)

• If TRIG_ON_STARTUP = 1, the detection circuit triggers the control-write sequencer whenever a selected sample

rate is detected, including when the AIF interface starts up, or when the sample-rate detection is first enabled.

As described above, setting TRIG_ON_STARTUP = 0 is designed to inhibit any response to the initial detection of a

sample rate that matches one of the SAMPLE_RATE_DETECT_n fields. Note that, if the LRCLK_SRC setting is changed,

or if the detection function is disabled and reenabled, a subsequent detection of a matching sample rate may trigger the

control-write sequencer, regardless of the TRIG_ON_STARTUP setting.

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