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CS47L35 датащи(PDF) 57 Page - Cirrus Logic |
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CS47L35 датащи(HTML) 57 Page - Cirrus Logic |
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57 / 300 page ![]() DS1085F3 57 CS47L35 4.3 Digital Core The DRC2 control registers are described in Table 4-14. Table 4-14. DRC2 Control Registers Register Address Bit Label Default Description R3585 (0x0E01) FX_Ctrl2 15:4 FX_STS[11:0] 0x00 LHPF, DRC, EQ Enable Status. Indicates the status of each of the respective signal-processing functions. Each bit is coded as follows: 0 = Disabled 1 = Enabled [11] = EQ4 [10] = EQ3 [9] = EQ2 [8] = EQ1 [7] = DRC2 (Right) [6] = DRC2 (Left) [5] = DRC1 (Right) [4] = DRC1 (Left) [3] = LHPF4 [2] = LHPF3 [1] = LHPF2 [0] = LHPF1 R3720 (0x0E88) DRC2_ctrl1 15:11 DRC2_SIG_ DET_RMS[4:0] 0x00 DRC2 Signal-Detect RMS Threshold. This is the RMS signal level for signal-detect to be indicated when DRC2_SIG_DET_MODE = 1. 0x00 = –30 dB 0x01 = –31.5 dB …. (1.5-dB steps) 0x1E = –75 dB 0x1F = –76.5 dB 10:9 DRC2_SIG_ DET_PK[1:0] 00 DRC2 Signal-Detect Peak Threshold. Peak/RMS ratio, or Crest Factor, level for signal-detect to be indicated when DRC2_SIG_DET_MODE = 0. 00 = 12 dB 01 = 18 dB 10 = 24 dB 11 = 30 dB 8 DRC2_NG_ ENA 0 DRC2 Noise-Gate Enable 0 = Disabled 1 = Enabled 7 DRC2_SIG_ DET_MODE 0 DRC2 Signal-Detect Mode 0 = Peak threshold mode 1 = RMS threshold mode 6 DRC2_SIG_ DET 0 DRC2 Signal-Detect Enable 0 = Disabled 1 = Enabled 5 DRC2_ KNEE2_OP_ ENA 0 DRC2 KNEE2_OP Enable 0 = Disabled 1 = Enabled 4 DRC2_QR 1 DRC2 Quick-release Enable 0 = Disabled 1 = Enabled 3 DRC2_ ANTICLIP 1 DRC2 Anticlip Enable 0 = Disabled 1 = Enabled R3721 (0x0E89) DRC2_ctrl2 12:9 DRC2_ ATK[3:0] 0100 DRC2 Gain attack rate (seconds/6 dB) 0000 = Reserved 0001 = 181 s 0010 = 363 s 0011 = 726 s 0100 = 1.45 ms 0101 = 2.9 ms 0110 = 5.8 ms 0111 = 11.6 ms 1000 = 23.2 ms 1001 = 46.4 ms 1010 = 92.8 ms 1011 = 185.6 ms 1100 to 1111 = Reserved 8:5 DRC2_ DCY[3:0] 1001 DRC2 Gain decay rate (seconds/6 dB) 0000 = 1.45 ms 0001 = 2.9 ms 0010 = 5.8 ms 0011 = 11.6 ms 0100 = 23.25 ms 0101 = 46.5 ms 0110 = 93 ms 0111 = 186 ms 1000 = 372 ms 1001 = 743 ms 1010 = 1.49 s 1011 = 2.97 s 1100 to 1111 = Reserved 4:2 DRC2_ MINGAIN[2:0] 100 DRC2 Minimum gain to attenuate audio signals 000 = 0 dB 001 = –12 dB (default) 010 = –18 dB 011 = –24 dB 100 = –36 dB 101 = Reserved 11X = Reserved 1:0 DRC2_ MAXGAIN[1:0] 11 DRC2 Maximum gain to boost audio signals (dB) 00 = 12 dB 01 = 18 dB 10 = 24 dB 11 = 36 dB |
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