CS47L35 datasheet(185/300 Pages) CIRRUS

185 / 300 page

DS1085F3

185

CS47L35

4.15 Interrupts

The IRQ output and polarity control registers are described in Table 4-91.

R6542 (0x198E)

IRQ2_Raw_

Status_15

2 SPK_OVERHEAT_WARN_STS2

Speaker Overheat Warning Status

0 = Normal

1 = Warning temperature exceeded

1 SPK_OVERHEAT_STS2

Speaker Overheat Status

0 = Normal

1 = Shutdown temperature exceeded

0 SPK_SHUTDOWN_STS2

Speaker Shutdown Status

0 = Normal

1 = Speaker Shutdown completed (due to Overheat Temperature

or Short Circuit condition)

R6544 (0x1990)

IRQ2_Raw_

Status_17

15 GP16_STS2

GPIOn Input status

Reads back the logic level of GPIOn.

Only valid for pins configured as GPIO input (does not include

DSPGPIO inputs).

14 GP15_STS2

13 GP14_STS2

12 GP13_STS2

11 GP12_STS2

10 GP11_STS2

9 GP10_STS2

8GP9_STS2

7GP8_STS2

6GP7_STS2

5GP6_STS2

4GP5_STS2

3GP4_STS2

2GP3_STS2

1GP2_STS2

0GP1_STS2

R6549 (0x1995)

IRQ2_Raw_

Status_22

3 EVENT4_NOT_EMPTY_STS2

Event Log n FIFO Not Empty status

0 = FIFO Empty

1 = FIFO Not Empty

2 EVENT3_NOT_EMPTY_STS2

1 EVENT2_NOT_EMPTY_STS2

0 EVENT1_NOT_EMPTY_STS2

R6550 (0x1996)

IRQ2_Raw_

Status_23

3 EVENT4_FULL_STS2

Event Log n FIFO Full status

0 = FIFO Not Full

1 = FIFO Full

2 EVENT3_FULL_STS2

1 EVENT2_FULL_STS2

0 EVENT1_FULL_STS2

R6551 (0x1997)

IRQ2_Raw_

Status_24

3 EVENT4_WMARK_STS2

Event Log n FIFO Watermark status

0 = FIFO Watermark not reached

1 = FIFO Watermark reached

2 EVENT3_WMARK_STS2

1 EVENT2_WMARK_STS2

0 EVENT1_WMARK_STS2

R6552 (0x1998)

IRQ2_Raw_

Status_25

2 DSP3_DMA_STS2

DSPn DMA status

0 = Normal

1 = All enabled WDMA buffers filled, and all enabled RDMA

buffers emptied

1 DSP2_DMA_STS2

0 DSP1_DMA_STS2

R6557 (0x199D)

IRQ2_Raw_

Status_30

2 DSP3_BUSY_STS2

DSPn Busy status

0 = DSP Idle

1 = DSP Busy

1 DSP2_BUSY_STS2

0 DSP1_BUSY_STS2

Table 4-90. Interrupt 2 Control Registers (Cont.)

Label

Default

Description

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