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CS47L35 датащи(PDF) 184 Page - Cirrus Logic |
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CS47L35 датащи(HTML) 184 Page - Cirrus Logic |
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184 / 300 page ![]() 184 DS1085F3 CS47L35 4.15 Interrupts R6529 (0x1981) IRQ2_Raw_ Status_2 8 FLL1_LOCK_STS2 0 FLL1 Lock Status 0 = Not locked 1 = Locked R6534 (0x1986) IRQ2_Raw_ Status_7 4 MICD_CLAMP_STS2 0 MICDET Clamp status 0 = Clamp not active 1 = Clamp active 2 JD2_STS2 0 JACKDET2 input status 0 = Jack not detected 1 = Jack is detected (Assumes the JACKDET2 pin is pulled low on jack insertion.) 0 JD1_STS2 0 JACKDET1 input status 0 = Jack not detected 1 = Jack is detected (Assumes the JACKDET1 pin is pulled low on jack insertion.) R6536 (0x1988) IRQ2_Raw_ Status_9 1 DRC2_SIG_DET_STS2 0 DRC2 Signal-Detect Status 0 = Normal 1 = Signal detected 0 DRC1_SIG_DET_STS2 0 DRC1 Signal-Detect Status 0 = Normal 1 = Signal detected R6539 (0x198B) IRQ2_Raw_ Status_12 6 SPKOUTL_SC_STS2 0 SPKOUT Short Circuit Status 0 = Normal 1 = Short Circuit detected 3 HP2R_SC_STS2 0 EPOUTN Short Circuit Status 0 = Normal 1 = Short Circuit detected 2 HP2L_SC_STS2 0 EPOUTP Short Circuit Status 0 = Normal 1 = Short Circuit detected 1 HP1R_SC_STS2 0 HPOUTR Short Circuit Status 0 = Normal 1 = Short Circuit detected 0 HP1L_SC_STS2 0 HPOUTL Short Circuit Status 0 = Normal 1 = Short Circuit detected R6540 (0x198C) IRQ2_Raw_ Status_13 6 SPKOUTL_ENABLE_DONE_STS2 0 SPKOUT Enable Status 0 = Busy (sequence in progress) 1 = Idle (sequence completed) 1 HP1R_ENABLE_DONE_STS2 0 HPOUTR/EPOUTN Enable Status 0 = Busy (sequence in progress) 1 = Idle (sequence completed) 0 HP1L_ENABLE_DONE_STS2 0 HPOUTL/EPOUTP Enable Status 0 = Busy (sequence in progress) 1 = Idle (sequence completed) R6541 (0x198D) IRQ2_Raw_ Status_14 6 SPKOUTL_DISABLE_DONE_STS2 0 SPKOUT Disable Status 0 = Busy (sequence in progress) 1 = Idle (sequence completed) 1 HP1R_DISABLE_DONE_STS2 0 HPOUTR/EPOUTN Disable Status 0 = Busy (sequence in progress) 1 = Idle (sequence completed) 0 HP1L_DISABLE_DONE_STS2 0 HPOUTL/EPOUTP Disable Status 0 = Busy (sequence in progress) 1 = Idle (sequence completed) Table 4-90. Interrupt 2 Control Registers (Cont.) Register Address Bit Label Default Description |
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