CS47L35 datasheet(61/300 Pages) CIRRUS

61 / 300 page

DS1085F3

CS47L35

4.3 Digital Core

4.3.7

Digital-Core DSP

The digital core provides three programmable DSP processing blocks as shown in Fig. 4-20. Each block supports eight

inputs (Left, Right, Aux1, Aux2, … Aux6). A four-input mixer is associated with the left and right inputs, providing further

expansion of the number of input paths. Each of the input sources is selectable, and independent volume control is

provided for left and right input mixer channels. Each DSP block supports six outputs.

The functionality of the DSP processing blocks is not fixed, and a wide range of audio enhancements algorithms may be

performed. The procedure for configuring the CS47L35 DSP functions is tailored to each customer’s application; please

contact your Cirrus Logic representative for details.

For details of the DSP firmware requirements relating to clocking, register access, and code execution, refer to

Section 4.4.2.

Figure 4-20. Digital-Core DSP Blocks

The DSPn mixer input control fields (see Fig. 4-20) are located at register addresses R2368–R2511 (0x0940–0x09CF).

The full list of digital mixer control registers (R1600–R2936) is provided in Section 6. Generic register field definitions are

provided in Table 4-7.

The x_SRCn fields select the input sources for the respective DSP processing blocks. Note that the selected input sources

must be configured for the same sample rate as the DSP to which they are connected. Sample-rate conversion functions

are available to support flexible interconnectivity; see Section 4.3.14.

The hexadecimal numbers in Fig. 4-20 indicate the corresponding x_SRCn setting for selection of that signal as an input

to another digital-core function.

DSP

DSPn

Channel 1

DSPn

Channel 2

DSPn

Channel 3

DSPn

Channel 4

DSPn

Channel 5

DSPn

Channel 6

DSP1 Outputs:

(0x68, 0x69, 0x6A,

0x6B, 0x6C, 0x6D)

DSP2 Outputs:

(0x70, 0x71, 0x72,

0x73, 0x74, 0x75)

DSP3 Outputs:

(0x78, 0x79, 0x7A,

0x7B, 0x7C, 0x7D)

DSPnLMIX_SRC1

DSPnLMIX_SRC3

DSPnLMIX_SRC4

DSPnLMIX_SRC2

DSPnRMIX_SRC1

DSPnRMIX_SRC3

DSPnRMIX_SRC4

DSPnRMIX_SRC2

DSPnLMIX_VOL2

DSPnLMIX_VOL3

DSPnLMIX_VOL4

DSPnLMIX_VOL1

DSPnRMIX_VOL2

DSPnRMIX_VOL3

DSPnRMIX_VOL4

DSPnRMIX_VOL1

…

CS47L35 supports three DSP blocks, i.e., n = 1–3

CS47L35 датащи(PDF) 61 Page - Cirrus Logic

CS47L35 датащи(HTML) 61 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL