ADP1055ACPZ-R7 datasheet(106/140 Pages) AD

106 / 140 page

ADP1055

Data Sheet

Rev. A | Page 106 of 140

Register 0xFE3D masks PWM disabling when a fault condition causes the device to disable the output and wait for the fault to clear

(Response[7:6] = 11). Note that this masking register applies only when the ADP1055 is servicing a fault condition that has the fault

response programmed to Bits[7:6] = 11.

Table 174. Register 0xFE3D—PWM_FAULT_MASK

Bits

Bit Name

R/W

Description

[7:6]

Reserved

Reserved.

Mask SR2

R/W

0 = SR2 disabled on fault; 1 = SR2 ignores fault.

Mask SR1

R/W

0 = SR1 disabled on fault; 1 = SR1 ignores fault.

Mask OUTD

R/W

0 = OUTD disabled on fault; 1 = OUTD ignores fault.

Mask OUTC

R/W

0 = OUTC disabled on fault; 1 = OUTC ignores fault.

Mask OUTB

R/W

0 = OUTB disabled on fault; 1 = OUTB ignores fault.

Mask OUTA

R/W

0 = OUTA disabled on fault; 1 = OUTA ignores fault.

Table 175. Register 0xFE3E—DELAY_TIME_UNIT

Bits

Bit Name

R/W

Description

Current fault delay time

unit

R/W

0 = ms.

1 = μs.

[6:4]

Current fault delay time

multiplier

R/W

Bit 6

Bit 5

Bit 4

Multiplier

128

256

512

1024

Voltage/other

fault delay time unit

R/W

0 = ms.

1 = μs.

[2:0]

Voltage/other fault

delay time multiplier

R/W

Bit 2

Bit 1

Bit 0

Multiplier

128

256

512

1024

Table 176. Register 0xFE3F—WDT_SETTING

Bits

Bit Name

R/W

Description

[7:2]

Reserved

Reserved.

[1:0]

Watchdog timeout

Bit 1

Bit 0

Timeout

Disable

1 sec

5 sec

10 sec

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