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MNSC140CORE датащи(PDF) 48 Page - Freescale Semiconductor, Inc

номер детали MNSC140CORE
подробное описание детали  Quad Core 16-Bit Digital Signal Processor
PDF  80 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
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MNSC140CORE датащи(HTML) 48 Page - Freescale Semiconductor, Inc

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MSC8102 Quad Core Digital Signal Processor, Rev. 12
2-18
Freescale Semiconductor
Specifications
2.5.7
TDM Timing
Table 2-18.
TDM Timing
Number
Characteristic
Expression
Minimum
Maximum
Units
300
TDMxRCLK/TDMxTCLK
TC1
20
—
ns
301
TDMxRCLK/TDMxTCLK high pulse width
(0.5
± 0.1) × TC
8
—
ns
302
TDMxRCLK/TDMxTCLK Low pulse width
(0.5
± 0.1) × TC
8
—
ns
303
TDM receive all input set-up time
2.5
—
ns
304
TDM receive all input hold time
2.5
—
ns
305
TDMxTCLK high to TDMxTDAT/TDMxRCLK output
active2,3
3
—
ns
306
TDMxTCLK high to TDMxTDAT/TDMxRCLK output valid2,3
—
12
ns
307
All output hold time2
4
—
ns
308
TDMxTCLK high to TDmXTDAT/TDMxRCLK output high
impedance
2,3
—
11
ns
309
TDMxTCLK high to TDMXTSYN output valid
2
—
11
ns
310
TDMxTSYN output hold time
2
3.9
—
ns
Notes:
1.
Values are based on a frequency range of 9–50 MHz.
2.
Values are based on 30 pF capacitive load.
3.
When configured as an output, TDMxRCLK acts as a second data link. See Chapter 22 of the
MSC8102 Reference Manual for
details.
Figure 2-13.
TDM Inputs Signals
Figure 2-14.
TDM Output Signals
TDMxRCLK
TDMxRDAT
TDMxRSYN
300
301
302
303
303
304
304
TDMxTCLK
TDMxTDAT
TDMxTSYN
305
306
308
307
300
301
302
310
309
TDMxRCLK



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