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ATtiny167-ESSZ датащи(PDF) 184 Page - ATMEL Corporation

номер детали ATtiny167-ESSZ
подробное описание детали  8-bit Microcontroller with 8K/16K Bytes In-System Programmable Flash and LIN Controller
PDF  282 Pages
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производитель  ATMEL [ATMEL Corporation]
домашняя страница  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATtiny167-ESSZ датащи(HTML) 184 Page - ATMEL Corporation

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7728D–AVR–07/09
ATtiny87/ATtiny167
• Bit 6 - LTOERR: Frame_Time_Out Error Flag
–0 = No error,
– 1 = Frame_Time_Out error.
This bit is cleared when LERR bit in LINSIR is cleared.
• Bit 5 - LOVERR: Overrun Error Flag
–0 = No error,
– 1 = Overrun error.
This bit is cleared when LERR bit in LINSIR is cleared.
• Bit 4 - LFERR: Framing Error Flag
–0 = No error,
– 1 = Framing error.
This bit is cleared when LERR bit in LINSIR is cleared.
• Bit 3 - LSERR: Synchronization Error Flag
–0 = No error,
– 1 = Synchronization error.
This bit is cleared when LERR bit in LINSIR is cleared.
• Bit 2 - LPERR: Parity Error Flag
–0 = No error,
– 1 = Parity error.
This bit is cleared when LERR bit in LINSIR is cleared.
• Bit 1 - LCERR: Checksum Error Flag
–0 = No error,
– 1 = Checksum error.
This bit is cleared when LERR bit in LINSIR is cleared.
• Bit 0 - LBERR: Bit Error Flag
–0 = no error,
– 1 = Bit error.
This bit is cleared when LERR bit in LINSIR is cleared.
15.6.5
LIN Bit Timing Register - LINBTR
• Bit 7 - LDISR: Disable Bit Timing Re synchronization
– 0 = Bit timing re-synchronization enabled (default),
– 1 = Bit timing re-synchronization disabled.
Bit
7654
3
2
1
0
LDISR
-
LBT5
LBT4
LBT3
LBT2
LBT1
LBT0
LINBTR
Read/Write
R/W
R
R/(W)
R/(W)
R/(W)
R/(W)
R/(W)
R/(W)
Initial Value
0010
0
0
0
0



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