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AD9548/PCBZ датащи(PDF) 72 Page - Analog Devices

номер детали AD9548/PCBZ
подробное описание детали  Quad/Octal Input Network Clock Generator/Synchronizer
PDF  112 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD9548/PCBZ датащи(HTML) 72 Page - Analog Devices

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AD9548
Rev. 0 | Page 72 of 112
Table 45. Nominal System Clock (SYSCLK) Period1
Address
Bits
Bit Name
Description
0103
[7:0]
System clock period
(expressed in
femtoseconds)
System clock period, Bits[7:0]
0104
[7:0]
System clock period, Bits[15:8]
0105
[7:5]
Unused
[4:0]
System clock period
System clock period, Bits[20:16]
1 Units are femtoseconds. The default value is 0x0F424 = 1,000,000 (1 ns) and implies a system clock frequency of 1 GHz.
Table 46. System Clock Stability Period1
Address
Bits
Bit Name
Description
0106
[7:0]
System clock stability
period
System clock stability period, Bits[7:0] (default = 0x01)
0107
[7:0]
System clock stability period, Bits[15:8] (default = 0x00)
0108
[7:4]
Unused
[3:0]
System clock stability
period
System clock stability period, Bits[19:16] (default = 0x0)
(default period = 0x00001, or 1 ms)
1 Units are milliseconds. The default value is 0x000001 = 1 (1 ms).
GENERAL CONFIGURATION (REGISTER 0200 TO REGISTER 0214)
Register 0200 to Register 0207—Multifunction Pin Control (M0 to M7)
Table 47. Multifunction Pin (M0 to M7) Control1
Address
Bits
Bit Name
Description
0200
[7]
M0 in/out
In/out control for the M0 pin
0 (default) = input (control pin)
1 = output (status pin)
[6:0]
M0 function
See Table 24 and Table 25 (default = 0xb0000000)
0201
[7]
M1 in/out
In/out control for the M1 pin (same as M0)
[6:0]
M1 function
See Table 24 and Table 25 (default = 0xb0000000)
0202
[7]
M2 in/out
In/out control for the M2 pin (same as M0)
[6:0]
M2 function
See Table 24 and Table 25 (default = 0xb0000000)
0203
[7]
M3 in/out
In/out control for the M3 pin (same as M0)
[6:0]
M3 function
See Table 24 and Table 25 (default = 0xb0000000)
0204
[7]
M4 in/out
In/out control for the M4 pin (same as M0)
[6:0]
M4 function
See Table 24 and Table 25 (default = 0xb0000000)
0205
[7]
M5 in/out
In/out control for the M5 pin (same as M0)
[6:0]
M5 function
See Table 24 and Table 25 (default = 0xb0000000)
0206
[7]
M6 in/out
In/out control for the M6 pin (same as M0)
[6:0]
M6 function
See Table 24 and Table 25 (default = 0xb0000000)
0207
[7]
M7 in/out
In/out control for the M7 pin (same as M0)
[6:0]
M7 function
See Table 24 and Table 25 (default = 0xb0000000)
1 The default setting for all the multifunction pins is as an unused control input pin.
Table 48. IRQ Pin Output Mode
Address
Bits
Bit Name
Description
0208
[7:2]
Unused
[1:0]
IRQ pin output mode
Select the output mode of the IRQ pin
00 (default) = NMOS, open drain (requires an external pull-up resistor)
01 = PMOS, open drain (requires an external pull-down resistor)
10 = CMOS, active high
11 = CMOS, active low



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