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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AD9548/PCBZ датащи(PDF) 45 Page - Analog Devices |
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AD9548/PCBZ датащи(HTML) 45 Page - Analog Devices |
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45 / 112 page  AD9548 Rev. 0 | Page 45 of 112 Bits[6:0] Value Output Function Destination Proxy 5 Tuning word history reset Register 0A03, Bit 2 6 to 15 Unused 16 Holdover Register 0A01, Bit 6 17 Free run Register 0A01, Bit 5 18 Reset incremental phase offset Register 0A0C, Bit 2 19 Increment incremental phase offset Register 0A0C, Bit 0 20 Decrement incremental phase offset Register 0A0C, Bit 1 21 to 31 Unused 32 Override Reference Monitor A Register 0A0F, Bit 0 33 Override Reference Monitor AA Register 0A0F, Bit 1 34 Override Reference Monitor B Register 0A0F, Bit 2 35 Override Reference Monitor BB Register 0A0F, Bit 3 36 Override Reference Monitor C Register 0A0F, Bit 4 37 Override Reference Monitor CC Register 0A0F, Bit 5 38 Override Reference Monitor D Register 0A0F, Bit 6 39 Override Reference Monitor DD Register 0A0F, Bit 7 40 to 47 Unused 48 Force validation Timeout A Register 0A0E, Bit 0 49 Force validation Timeout AA Register 0A0E, Bit 1 50 Force validation Timeout B Register 0A0E, Bit 2 51 Force validation Timeout BB Register 0A0E, Bit 3 52 Force validation Timeout C Register 0A0E, Bit 4 53 Force validation Timeout CC Register 0A0E, Bit 5 54 Force validation Timeout D Register 0A0E, Bit 6 55 Force validation Timeout DD Register 0A0E, Bit 7 56 to 63 Unused 64 Enable OUT0 Register 0401, Bit 0 65 Enable OUT1 Register 0401, Bit 1 66 Enable OUT2 Register 0401, Bit 2 67 Enable OUT3 Register 0401, Bit 3 68 Enable OUT0, OUT1, OUT2, OUT3 Register 0401, Bits[3:0] 69 Sync clock distribution outputs Register 0A02, Bit 1 70 to 127 Unused If more than one multifunction pin operates on the same control signal, then internal priority logic ensures that only one multifunction pin serves as the signal source. The selected pin is the one with the lowest numeric suffix. For example, if both M3 and M7 operate on the same control signal, then M3 is used as the signal source and the redundant pins are ignored. At power-up, the multifunction pins can be used to force the device into certain configurations as defined in the initial pin programming section. This functionality, however, is valid only during power-up or following a reset, after which the pins can be reconfigured via the serial programming port or via the EEPROM. IRQ PIN The AD9548 has a dedicated interrupt request (IRQ) pin. The IRQ pin output mode register (Register 0208, Bits[1:0]) controls how the IRQ pin asserts an interrupt based on the value of the two bits, as follows: 00—The IRQ pin is high impedance when deasserted and active low when asserted and requires an external pull-up resistor (this is the default operating mode). 01—The IRQ pin is high impedance when deasserted and active high when asserted and requires an external pull-down resistor. 10—The IRQ pin is Logic 0 when deasserted and Logic 1 when asserted. 11—The IRQ pin is Logic 1 when deasserted and Logic 0 when asserted. The AD9548 asserts the IRQ pin whenever any of the bits in the IRQ monitor register (Address 0D02 to Address 0D09) are Logic 1. Each bit in this register is associated with an internal function capable of producing an interrupt. Furthermore, each bit of the IRQ monitor register is the result of a logical AND of the associated internal interrupt signal and the corresponding bit in the IRQ mask register (Address 0209 to Address 0210). That is, the bits in the IRQ mask register have a one-to-one correspondence with the bits in the IRQ monitor register. Whenever an internal function produces an interrupt signal and the associated IRQ mask bit is set, then the corresponding bit in the IRQ monitor register is set. The user should be aware that clearing a bit in the IRQ mask register removes only the mask associated with the internal interrupt signal. It does not clear the corresponding bit in the IRQ monitor register. The IRQ pin is the result of a logical OR of all the IRQ monitor register bits. Thus, the AD9548 asserts the IRQ pin so long as any of the IRQ monitor register bits are Logic 1. Note that it is possible to have multiple bits set in the IRQ monitor register. Therefore, when the AD9548 asserts the IRQ pin, it may indicate an interrupt from several different internal functions. The IRQ monitor register provides the user with a means to interrogate the AD9548 to determine which internal function(s) produced the interrupt. |
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