AD9548SLASHPCBZ datasheet(51/112 Pages) AD

51 / 112 page

AD9548

Rev. 0 | Page 51 of 112

SERIAL CONTROL PORT

13-BIT ADDRESS

SPACE

READ ONLY

REGION

READ/WRITE

REGION

ANALOG BLOCKS AND

DIGITAL CORE

POWER-ON RESET

SERIAL CONTROL ARBITER

SPI

EEPROM

CONTROLLER

400kHz

MULTI-

FUNCTION

PIN CONTROL

LOGIC

SCLK/SCL

CS/SDA

SDIO

SDO

EEPROM

Figure 51. Serial Port Functional Diagram

The AD9548 serial control port is a flexible, synchronous serial

communications port that provides a convenient interface to

many industry-standard microcontrollers and microprocessors.

The AD9548 serial control port is compatible with most

synchronous transfer formats, including Philips I2C, Motorola

SPI, and Intel SSR protocols. The serial control port allows

read/write access to the AD9548 register map.

In SPI mode, single or multiple byte transfers are supported.

The SPI port configuration is programmable via Register 0000.

This register is integrated into the SPI control logic rather than

in the register map and is distinct from the I2C Register 0000. It

is also inaccessible to the EEPROM controller.

A functional diagram of the serial control port, including its

relationship to the EEPROM, appears in Figure 51.

Although the AD9548 supports both the SPI and I2C serial port

protocols, only one is active following power-up (as determined

by the multifunction pins, M0 to M2, during the startup

sequence). That is, the only way to change the serial port

protocol is to reset the device (or cycle the device power

supply). Both protocols use a common set of control pins as

shown in Figure 52.

AD9548

SCLK/SCL

CSB/SDA

SDO

SDIO

SERIAL

CONTROL

PORT

Figure 52. Serial Control Port

SPI/I²C PORT SELECTION

Because the AD9548 supports both SPI and I2C protocols, the

active serial port protocol depends on the logic state of the three

multifunction pins, M0 to M2, at startup. If all three pins are set

to Logic 0 at startup, then the SPI protocol is active. Otherwise,

the I2C protocol is active with seven different I2C slave address

settings based on the startup logic pattern on the M0 to M2 pins

(see Table 28). Note that the four MSBs of the slave address are

hardware coded as 1011.

Table 28. Serial Port Mode Selection

Serial Port Mode

SPI

I²C (address = 1001001)

I²C (address = 1001010)

I²C (address = 1001011)

I²C (address = 1001100)

I²C (address = 1001101)

I²C (address = 1001110)

I²C (address = 1001111)

SPI SERIAL PORT OPERATION

Pin Descriptions

The SCLK (serial clock) pin serves as the serial shift clock. This

pin is an input. SCLK synchronizes serial control port read and

write operations. The rising edge SCLK registers write data bits,

and the falling edge registers read data bits. The SCLK pin

supports a maximum clock rate of 40 MHz.

The SDIO (serial data input/output) pin is a dual-purpose pin

and acts as either an input only (unidirectional mode) or as

both an input and an output (bidirectional mode). The AD9548

default SPI mode is bidirectional.

The SDO (serial data output) pin is useful only in

unidirectional I/O mode. It serves as the data output pin for

read operations.

The CS (chip select) pin is an active low control that gates read

and write operations. This pin is internally connected to a 30 kΩ

pull-up resistor. When CS is high, the SDO and SDIO pins go

into a high impedance state.

SPI Mode Operation

The SPI port supports both 3-wire (bidirectional) and 4-wire

(unidirectional) hardware configurations and both MSB-first

and LSB-first data formats. Both the hardware configuration

AD9548/PCBZ датащи(PDF) 51 Page - Analog Devices

AD9548/PCBZ датащи(HTML) 51 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL