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TMP86CS64AFG датащи(PDF) 152 Page - Toshiba Semiconductor |
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TMP86CS64AFG датащи(HTML) 152 Page - Toshiba Semiconductor |
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152 / 202 page ![]() Page 142 14. Asynchronous Serial interface (UART ) 14.10 Status Flag TMP86CS64AFG 14.10Status Flag 14.10.1Parity Error When parity determined using the receive data bits differs from the received parity bit, the parity error flag UARTSR<PERR> is set to “1”. The UARTSR<PERR> is cleared to “0” when the RDBUF is read after read- ing the UARTSR. Figure 14-6 Generation of Parity Error 14.10.2Framing Error When “0” is sampled as the stop bit in the receive data, framing error flag UARTSR<FERR> is set to “1”. The UARTSR<FERR> is cleared to “0” when the RDBUF is read after reading the UARTSR. Figure 14-7 Generation of Framing Error 14.10.3Overrun Error When all bits in the next data are received while unread data are still in RDBUF, overrun error flag UARTSR<OERR> is set to “1”. In this case, the receive data is discarded; data in RDBUF are not affected. The UARTSR<OERR> is cleared to “0” when the RDBUF is read after reading the UARTSR. Parity Stop Shift register pxxxx0* 1pxxxx0 xxxx0** RXD1 pin UARTSR<PERR> INTTRX interrupt After reading UARTSR then RDBUF clears PERR. Final bit Stop Shift register xxxx0* 0xxxx0 xxx0** RXD1 pin UARTSR<FERR> INTTRX interrupt After reading UARTSR then RDBUF clears FERR. |
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