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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP86CS64AFG датащи(PDF) 25 Page - Toshiba Semiconductor |
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TMP86CS64AFG датащи(HTML) 25 Page - Toshiba Semiconductor |
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25 / 202 page  Page 15 TMP86CS64AFG Figure 2-4 Timing Generator Configuration Note 1: fc: High-frequency clock [Hz], *: Don't care Note 2: The bit 4 and 3 are read as a don't care when the read instruction is executed to CGCR. Table 2-3 Division Ratio of the Divider DV7CK = 0 DV7CK = 1 DV7CK = 0 DV7CK = 1 DV1CK = 0 DV1CK = 1 DV1CK = 0 DV1CK = 1 DV1CK = 0 DV1CK = 1 DV1CK = 0 DV1CK = 1 DV1 fc/23 fc/24 fc/23 fc/24 DV12 fc/214 fc/215 fs/26 DV2 fc/24 fc/25 fc/24 fc/25 DV13 fc/215 fc/216 fs/27 DV3 fc/25 fc/26 fc/25 fc/26 DV14 fc/216 fc/217 fs/28 DV4 fc/26 fc/27 fc/26 fc/27 DV15 fc/217 fc/218 fs/29 DV5 fc/27 fc/28 fc/27 fc/28 DV16 fc/218 fc/219 fs/210 DV6 fc/28 fc/29 fc/28 fc/29 DV17 fc/219 fc/220 fs/211 DV7 fc/29 fc/210 fs/2 DV18 fc/220 fc/221 fs/212 DV8 fc/210 fc/211 fs/22 DV19 fc/221 fc/222 fs/213 DV9 fc/211 fc/212 fs/23 DV20 fc/222 fc/223 fs/214 DV10 fc/212 fc/213 fs/24 DV21 fc/223 fc/224 fs/215 DV11 fc/213 fc/214 fs/25 Divider Control Register CGCR (0030H) 7 654 321 0 "0" "0" DV1CK "0" "0" "0" "0" "0" (Initial value: **0* ****) DV1CK Selection of the input clock to the 1st stage of the divider [Hz] 0: 1: fc/4 fc/8 R/W SYSCR2<SYSCK> TBTCR<DV7CK> High-frequency clock fc Low-frequency clock fc CGCR<DV1CK> Prescaler Divider Divider Selector Selector Selector fc or fs Machine cycle counter 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 S A Y B S A Y B S B0 B1 A0 Y0 A1 Y1 6 5 4 3 2 1 1 2 0 Main system clock generator Warm-up controller Watchdog timer TimerCounter, time base timer, divider output, etc. |
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