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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP86CS64AFG датащи(PDF) 78 Page - Toshiba Semiconductor |
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TMP86CS64AFG датащи(HTML) 78 Page - Toshiba Semiconductor |
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78 / 202 page  Page 68 5. I/O Ports TMP86CS64AFG 5.10 Port P9 (P97 to P90) Port P9 is an 8-bit input/output port, which can be configured individually as an input or an output under software control. Input/output mode is specified by the corresponding bit in the port P9 input/output control register (P9CR). During reset, the P9CR is initialized to “0”, which configures port P9 as an input. The P9 output latches are also ini- tialized to “0”. Note 1: i = 7 to 0 Note 2: STOP: bit 7 in SYSCR1, OUTEN: bit 4 in SYSCR1 Figure 5-11 Port P9 Note: When used as an input mode, read-modify-write instructions such as bit manipulate instructions cannot be used. Read- modify-write instruction writes the all data of 8-bit after read and modified. Because a bit setting input mode reads data of terminal, the output latch is changed by these instructions. P9DR (0FB1H) 76 543 21 0 P97 P96 P95 P94 P93 P92 P91 P90 (Initial value: 0000 0000) P9CR (0FB3H) 76 543 21 0 P9CR7 P9CR6 P9CR5 P9CR4 P9CR3 P9CR2 P9CR1 P9CR0 (Initial value: 0000 0000) P9CR I/O control for port P9 (specified for each bit) 0: Input mode 1: Output mode R/W Output latch STOP OUTEN Data input Data output P9CRi P9i D Q |
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