TMP86CS64AFG datasheet(43/202 Pages) TOSHIBA

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Page 33

TMP86CS64AFG

2.2.4.4 SLOW Mode

The SLOW mode is controlled by the system control register 2 (SYSCR2).

(1) Switching the NORMAL2 mode to SLOW mode

Write 1 to SYSCR2<SYSCK> to switch the main system clock to the low-frequency clock. Clear

SYSCR2<XEN> to 0 to stop the high-frequency oscillator.

Note: The high-frequency clock oscillation can be continued to return quickly to the NORMAL2 mode.

To enter the STOP mode from the SLOW mode, the high-frequency clock must be stopped.

When the low-frequency clock oscillation is unstable, wait until the oscillation is stabilized before performing the above operation.

The TimerCounter (TC2) is convenient to check the low-frequency clock oscillation stability.)

Example 1 :Switching from the NORMAL2 mode to SLOW1 mode.

SET

(SYSCR2) . 5

: SYSCR2<SYSCK>¨1

: (switches the system clock to the low-frequency clock for the

SLOW2 mode.)

CLR

(SYSCR2) . 7

: SYSCR2<XEN>¨0(stops the high-frequency oscillation.)

Example 2 :Switching to the SLOW1 mode after checking the low-frequency clock oscillation stability with TC2

SET

(SYSCR2). 6

: SYSCR2<XTEN>¨1

: (starts low-frequency oscillation.)

(TC2CR), 14H

: sets the mode for TC2.

LDW

(TC2DRL), 8000H

:sets the warm-up time.

: (determines the time depending on the resonator.)

: IMF¨0

SET

(EIRH). 4

: enables the INTTC2.

: IMF¨1

SET

(TC2CR). 5

: starts INTTC2.

PINTTC2:

CLR

(TC2CR). 5

: stops INTTC2.

SET

(SYSCR2). 5

: SYSCR2<SYSCK>¨1

: (switches the system clock to the low-frequency clock.)

CLR

(SYSCR2). 7

: SYSCR2<XEN>¨0(stops the high-frequency clock.)

RETI

VINTTC2:

PINTTC2

: INTTC2 vector table

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