TMP86CS64AFG datasheet(31/202 Pages) TOSHIBA

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Page 21

TMP86CS64AFG

2.2.4 Operating Mode Control

Note 1: To transit from the NOMAL mode to the STOP mode, set RETM to 0. To transit from the STOP mode to the NOMAL mode,

set RETM to 1.

Note 2: When exiting the STOP mode with the RESET pin input, the CPU returns to the NORMAL1 mode regardless of the RETM

value.

Note 3: fc: High-frequency clock [Hz], fs: Low-frequency clock [Hz], *: Don't care

Note 4: Bit 1 and 0 in SYSCR1 are read as don't cares.

Note 5: When entering the STOP mode with OUTEN = 0, input value is fixed to 0. That may cause an external interrupt request to

be set on falling edge.

Note 6: To use the Key on wake-up is used, set RELM to 1.

Note 7: The P20 pin is shared with the STOP pin. When the STOP mode is entered, output assumes the high-impedance state

regardless of the OUTEN state.

Note 8: Select the warm-up period time depending on the feature of the resonator to be used.

System Control Register 1

6543210

SYSCR1

(0038H)

STOP

RELM

RETM

OUTEN

WUT

"0"

(Initial value: 0000 00**)

STOP

STOP mode enter

0: CPU core and peripherals operate

1: CPU core and peripherals halt (Enter STOP mode)

R/W

RELM

STOP mode exit method

0: Edge-sensitive (Exit at the rising edge of STOP pin)

1: Level-sensitive (Exit at the high level of STOP pin)

R/W

RETM

Operating mode after STOP

mode

0: Return to NORMAL 1/2 mode

1: Return to SLOW1 mode

R/W

OUTEN

Port output during STOP

mode

0: High impedance

1: Output retained

R/W

WUT

Warm-up time on exiting

STOP mode [ns]

Return to NORMAL 1/2 mode

Return to SLOW1

mode

R/W

DV1CK=0

DV1CK=1

3 × 216/fc

216/fc

3 × 214/fc

214/fc

3 × 217/fc

217/fc

3 × 215/fc

215/fc

3 × 213/fs

213/fs

3 × 26/fs

26/fs

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