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TMP86CS64AFG датащи(PDF) 77 Page - Toshiba Semiconductor |
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TMP86CS64AFG датащи(HTML) 77 Page - Toshiba Semiconductor |
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77 / 202 page ![]() Page 67 TMP86CS64AFG 5.9 Port P8 (P87 to P80) Port P8 is an 8-bit input/output port, which can be configured individually as an input or an output under software control. Input/output mode is specified by the corresponding bit in the port P8 input/output control register (P8CR). During reset, the P8CR is initialized to “0”, which configures port P8 as an input. The P8 output latches are also ini- tialized to “0”. Note 1: i = 7 to 0 Note 2: STOP: bit 7 in SYSCR1, OUTEN: bit 4 in SYSCR1 Figure 5-10 Port P8 Note: When used as an input mode, read-modify-write instructions such as bit manipulate instructions cannot be used. Read- modify-write instruction writes the all data of 8-bit after read and modified. Because a bit setting input mode reads data of terminal, the output latch is changed by these instructions. P8DR (0FB0H) 76 543 21 0 P87 P86 P85 P84 P83 P82 P81 P80 (Initial value: 0000 0000) P8CR (0FB2H) 76 543 21 0 P8CR7 P8CR6 P8CR5 P8CR4 P8CR3 P8CR2 P8CR1 P8CR0 (Initial value: 0000 0000) P8CR I/O control for port P8 (specified for each bit) 0: Input mode 1: Output mode R/W STOP OUTEN Data input Data output P8CRi Output latch P8i D Q |
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