TMP86CS64AFG datasheet(138/202 Pages) TOSHIBA

138 / 202 page

Page 128

13. 8-Bit TimerCounter 6 (TC6)

13.1 Configuration

TMP86CS64AFG

13.2 TimerCounter Control

The TimerCounter 6 is controlled by the TimerCounter 6 control register (TC6CR) and timer registers 6 (TC6DR).

Note 1: fc: High-frequency clock [Hz], fs: Low-frequency clock [Hz], *: Don’t care

Note 2: To set the timer registers, the following relationship must be satisfied.

≤ TC6DR ≤ 255

Note 3: To start timer operation (TC6S = 0

→ 1) or disable timer operation (TC6S = 1→ 0), do not change the

TC6CR<TC6M, TC6CK> setting. During timer operation (TC6S = 1

→ 1), do not change it, either. If the setting is

programmed during timer operation, counting is not performed correctly.

Note 4: The event counter and PWM output modes are used only in the NOMAL1/2 and IDLE1/2 modes.

Note 5: When the STOP mode is entered, the start control (TC6S) is cleared to “0” automatically.

Note 6: The bit 6 and 7 of TC6CR are read as a don’t care when these bits are read.

Note 7: In the timer, event counter and PDO modes, do not change the TC6DR setting when the timer is running.

Note 8: When the high-frequency clock fc exceeds 10 MHz, do not select the source clock of TC6CK = 110.

Note 9: The operating clock fs can not be used in NORMAL1 or IDEL1 mode (when low-frequency oscillation is stopped.)

Note 10:For available source clocks depending on the operation mode, refer to the following table.

Timer Register and Control Register

TC6DR

(0017)

543

Read/Write (Initial value: 1111 1111)

TC6CR

(0016)

543

TC6S

TC6CK

TC6M

Read/Write (Initial value: **00 0000)

TC6S

TC6 start control

0: Stop and counter clear

1: Start

R/W

TC6CK

TC6 source clock select

[Hz]

NORMAL1/2, IDLE1/2 mode

Divider

SLOW1/2,

SLEEP1/2

mode

R/W

DV7CK

= 0DV7CK = 1

DV1CK

= 0DV1CK = 1DV1CK = 0DV1CK = 1

000

fc/211

fc/212

fs/23

DV9

fs/23

001

fc/27

fc/28

fc/27

fc/28

DV5

–

010

fc/25

fc/26

fc/25

fc/26

DV3

–

011

fc/23

fc/24

fc/23

fc/24

DV1

–

100

fc/22

fc/23

fc/22

fc/23

––

101

fc/2

fc/22

fc/2

fc/22

––

110

fc/2

–

111

External clock (TC6 pin input)

TC6M

TC6 operating mode

select

00: Timer/event counter mode

01: Reserved

10: Programmable divider output (PDO) mode

11: Pulse width modulation (PWM) output mode

R/W

TC6CK

Timer Mode

Event Counter Mode

PDO Mode

PWM Mode

000

−

001

−

010

−

011

−−

100

−

−−

101

−−−

110

−−

−

111

−

TMP86CS64AFG датащи(PDF) 138 Page - Toshiba Semiconductor

TMP86CS64AFG датащи(HTML) 138 Page - Toshiba Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL