CS47L35 datasheet(193/300 Pages) CIRRUS

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DS1085F3

193

CS47L35

4.16 Clocking and Sample Rates

R288 (0x0120)

DSP_Clock_1

10:8 DSP_CLK_

FREQ_

RANGE[2:0]

011

DSPCLK Frequency

000=5.5 MHz to 9.375 MHz (9.216 MHz)

001=9.375 MHz to 18.75 MHz (18.432 MHz)

010=18.75 MHz to 37.5 MHz (36.864 MHz)

011=37.5 MHz to 75 MHz (73.728 MHz)

100=75 MHz to 150 MHz (147.456 MHz)

All other codes are reserved

The frequencies in brackets are the nominal (or typical) frequencies for each

setting.

If the DSPCLK frequency is equal to one of the threshold frequencies quoted (e.g.,

37.5 MHz), the higher range setting (e.g., 011) should be selected.

DSP_CLK_ENA

DSPCLK Control

0 = Disabled

1 = Enabled

DSPCLK should only be enabled after the applicable clock source has been

configured and enabled.

Set this bit to 0 when reconfiguring the clock sources.

3:0

DSP_CLK_

SRC[3:0]

0101

DSPCLK Source

0000 = MCLK1

0001 = MCLK2

0100 = FLL1

0111 = FLL1 DIV6

1000 = AIF1BCLK

1001 = AIF2BCLK

1010 = AIF3BCLK

All other codes are reserved

R329 (0x0149)

Output_system_

clock

OPCLK_ENA

OPCLK Enable

0 = Disabled

1 = Enabled

7:3

OPCLK_DIV[4:0]

0x00

OPCLK Divider

0x02 = Divide by 2

0x04 = Divide by 4

0x06 = Divide by 6

… (even numbers only)

0x1E = Divide by 30

Note that only even numbered divisions (2, 4, 6, etc.) are valid selections.

All other codes are reserved when the OPCLK signal is enabled.

2:0

OPCLK_SEL[2:0]

000

OPCLK Source Frequency

000 = 6.144 MHz (5.6448 MHz)

001 = 12.288 MHz (11.2896 MHz)

010 = 24.576 MHz (22.5792 MHz)

011 = 49.152 MHz (45.1584 MHz)

All other codes are reserved

The frequencies in brackets apply for 44.1 kHz–related SYSCLK rates only (i.e.,

SAMPLE_RATE_n = 01XXX).

The OPCLK Source Frequency must be less than or equal to the SYSCLK

frequency.

R334 (0x014E)

Clock_Gen_Pad_

Ctrl

MCLK2_PD

MCLK2 Pull-Down Control

0 = Disabled

1 = Enabled

MCLK1_PD

MCLK1 Pull-Down Control

0 = Disabled

1 = Enabled

Table 4-93. Clocking Control (Cont.)

Bit

Label

Default

Description

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