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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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K32L2AX датащи(PDF) 10 Page - NXP Semiconductors |
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K32L2AX датащи(HTML) 10 Page - NXP Semiconductors |
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10 / 96 page  Enter Boot Required Clocks NVM option is read FTFA_FOPT Is LBOOT programmed for alternate divider? Is cleared? Slower Clock No Yes No Yes RESET =0 SCG is enabled Sequence are enabled Flash Controller is initialized and stored in FAST_INIT is used Faster Clock for Flash init -Flash Init Complete -RESET released -Core clock enabled -System released from reset -Stack Pointer, -Program Counter -Link Register [BOOTPIN_OPT] FTFA_FOPT No execution at reset Yes execution at NMI CPU begins Interrupt Handler from ROM CPU boots Is NMI enabled in FTFA_FOPT? NMI/BOOTCFG0 No Yes No Or = 0? = 0? Set up is used for Flash init Yes vector residing CPU begins in flash Figure 2. Boot flow chart The blank chip is default to boot from ROM and remaps the vector table to ROM base address, otherwise, it remaps to flash address. Overview 10 K32 L2A Microcontroller with 512 KB Flash and 128 KB SRAM, Rev. 3, 02/2021 NXP Semiconductors |
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