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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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K32L2AX датащи(PDF) 56 Page - NXP Semiconductors |
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K32L2AX датащи(HTML) 56 Page - NXP Semiconductors |
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56 / 96 page  Table 26. Slow IRC specifications (continued) Symbol Description Min. Typ. Max. Unit Notes IDD_sirc8M Supply current in 8 MHz mode — 25 35 μA fsirc Output frequency — 2 — MHz 1 — 8 — Δfsirc Total deviation of trimmed frequency over voltage and temperature • 0 to 105 °C • -40 to 0 °C — — — — ±3 ±4 %fsirc 2 Δfsirc_t Total deviation of trimmed frequency over temperature @VDD=3.3V — — ±3 %fsirc 2 Tsu_sirc Startup time — — 12.5 μs Jcyc_sirc Period jitter (RMS) • fsirc = 2 MHz • fsirc = 8 Mhz — — 350 100 — — ps 3 1. Selection of output frequency for Slow IRC between 2 MHz and 8 MHz is controlled by SCG_ SIRCCFG[RANGE]. 2. Maximum deviation occurs at cold temperature (-40 °C) and hot temperature (105 °C). 3. This specification was obtained using a NXP developed PCB. Jitter is dependent on the noise characteristics of each PCB and results will vary. 8.3.1.3 System PLL specifications Table 27. System PLL Specifications Symbol Description Min. Typ. Max. Unit Notes fpll_ref PLL reference frequency range 8 — 16 MHz fvcoclk_2x VCO output frequency 180 — 288 MHz fvcoclk PLL output frequency 90 — 144 MHz Ipll PLL operating current — VCO @ 180 MHz (f osc_hi_2 = 10 MHz , f pll_ref = 10 MHz ,VDIV multiplier = 18) — 1.1 — mA 1 PLL operating current — VCO @ 288 MHz (f osc_hi_2 = 32 MHz , f pll_ref = 8 MHz ,VDIV multiplier = 36) — 2.0 — Jcyc_pll PLL period jitter (RMS) • fvco = 180 MHz • fvco = 288 MHz — — 120 80 — — ps 2 Jacc_pll PLL accumilated jitter over 1 μs (RMS) • fvco = 180 MHz • fvco = 288 MHz — — 600 300 — — ps 2 Dunl Lock exit frequency tolerance ±4.47 — ±5.97 % tpll_lock Lock detector detection time — — 150 × 10-6 s 3 Peripheral operating requirements and behaviors 56 K32 L2A Microcontroller with 512 KB Flash and 128 KB SRAM, Rev. 3, 02/2021 NXP Semiconductors |
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