TMS320LC2401AVFS datasheet(91/134 Pages) TI

91 / 134 page

SPI MASTER MODE TIMING PARAMETERS

SPI master mode timing information is listed in the following tables.

SPI master mode external timing parameters (clock phase = 0)†‡ (see Figure 41)

NO.

SPI WHEN (SPIBRR + 1) IS EVEN

OR SPIBRR = 0 OR 2

SPI WHEN (SPIBRR + 1)

IS ODD AND SPIBRR > 3

UNIT

NO.

MIN

MAX

MIN

MAX

UNIT

tc(SPC)M

Cycle time, SPICLK

4tc(CO)

128tc(CO)

5tc(CO)

127tc(CO)

2§

tw(SPCH)M

Pulse duration, SPICLK high

(clock polarity = 0)

0.5tc(SPC)M−10

0.5tc(SPC)M

0.5tc(SPC)M−0.5tc(CO)−10

0.5tc(SPC)M −0.5tc(CO)

2§

tw(SPCL)M

Pulse duration, SPICLK low

(clock polarity = 1)

0.5tc(SPC)M−10

0.5tc(SPC)M

0.5tc(SPC)M−0.5tc(CO)−10

0.5tc(SPC)M −0.5tc(CO)

3§

tw(SPCL)M

Pulse duration, SPICLK low

(clock polarity = 0)

0.5tc(SPC)M−10

0.5tc(SPC)M

0.5tc(SPC)M+0.5tc(CO)−10

0.5tc(SPC)M + 0.5tc(CO)

3§

tw(SPCH)M

Pulse duration, SPICLK high

(clock polarity = 1)

0.5tc(SPC)M−10

0.5tc(SPC)M

0.5tc(SPC)M+0.5tc(CO)−10

0.5tc(SPC)M + 0.5tc(CO)

4§

td(SPCH-SIMO)M

Delay time, SPICLK high to

SPISIMO valid (clock polarity = 0)

− 10

4§

td(SPCL-SIMO)M

Delay time, SPICLK low to

SPISIMO valid (clock polarity = 1)

− 10

5§

tv(SPCL-SIMO)M

Valid time, SPISIMO data valid after

SPICLK low (clock polarity =0)

0.5tc(SPC)M−10

0.5tc(SPC)M+0.5tc(CO)−10

5§

tv(SPCH-SIMO)M

Valid time, SPISIMO data valid after

SPICLK high (clock polarity =1)

0.5tc(SPC)M−10

0.5tc(SPC)M+0.5tc(CO)−10

8§

tsu(SOMI-SPCL)M

Setup time, SPISOMI before

SPICLK low (clock polarity = 0)

8§

tsu(SOMI-SPCH)M

Setup time, SPISOMI before

SPICLK high (clock polarity = 1)

9§

tv(SPCL-SOMI)M

Valid time, SPISOMI data valid after

SPICLK low (clock polarity = 0)

0.25tc(SPC)M−10

0.5tc(SPC)M −0.5tc(CO)−10

9§

tv(SPCH-SOMI)M

Valid time, SPISOMI data valid after

SPICLK high (clock polarity = 1)

0.25tc(SPC)M−10

0.5tc(SPC)M −0.5tc(CO)−10

† The MASTER/SLAVE bit (SPICTL.2) is set and the CLOCK PHASE bit (SPICTL.3) is cleared.

‡ tc = system clock cycle time = 1/CLKOUT = tc(CO)

§ The active edge of the SPICLK signal referenced is controlled by the CLOCK POLARITY bit (SPICCR.6).

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