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TMS320LC2401AVFS датащи(PDF) 59 Page - Texas Instruments |
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TMS320LC2401AVFS датащи(HTML) 59 Page - Texas Instruments |
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59 / 134 page ![]() TMS320LF2407A,TMS320LF2406A,TMS320LF2403A,TMS320LF2402A TMS320LC2406A,TMS320LC2404A,TMS320LC2403A,TMS320LC2402A DSP CONTROLLERS SPRS145K − JULY 2000 − REVISED AUGUST 2005 59 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 external reference oscillator clock option (continued) External Clock Signal (Toggling 0 −3.3 V) Cb1 (see Note A) XTAL2 XTAL1/CLKIN XTAL1/CLKIN XTAL2 Crystal Cb2 (see Note A) (a) (b) NC NOTE A: TI recommends that customers have the resonator/crystal vendor characterize the operation of their device with the DSP chip. The resonator/crystal vendor has the equipment and expertise to tune the tank circuit. The vendor can also advise the customer regarding the proper tank component values that will ensure start-up and stability over the entire operating range. Figure 17. Recommended Crystal/Clock Connection loop filter The PLL module uses an external loop filter circuit for jitter minimization. The components for the loop filter circuit are R1, C1, and C2. The capacitors (C1 and C2) must be non-polarized. This loop filter circuit is connected between the PLLF and PLLF2 pins (see Figure 16). For examples of component values of R1, C1, and C2 at a specified oscillator frequency (XTAL1), see Table 10. Table 10. Loop Filter Component Values With Damping Factor = 2.0 XTAL1/CLKIN FREQUENCY (MHz) R1 ( Ω) (±5% TOLERANCE) C1 ( µF) (±20% TOLERANCE) C2 ( µF) (±20% TOLERANCE) 4 4.7 3.9 0.082 5 5.6 2.7 0.056 6 6.8 1.8 0.039 7 8.2 1.5 0.033 8 9.1 1 0.022 9 10 0.82 0.015 10 11 0.68 0.015 11 12 0.56 0.012 12 13 0.47 0.01 13 15 0.39 0.0082 14 15 0.33 0.0068 15 16 0.33 0.0068 16 18 0.27 0.0056 17 18 0.22 0.0047 18 20 0.22 0.0047 19 22 0.18 0.0039 20 24 0.15 0.0033 low-power modes The 240xA has an IDLE instruction. When executed, the IDLE instruction stops the clocks to all circuits in the CPU, but the clock output from the CPU continues to run. With this instruction, the CPU clocks can be shut down to save power while the peripherals (clocked with CLKOUT) continue to run. The CPU exits the IDLE state if it is reset, or, if it receives an interrupt request. |
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