TMS320LC2401AVFS datasheet(85/134 Pages) TI

85 / 134 page

TMS320LF2407A, TMS320LF2406A, TMS320LF2403A, TMS320LF2402A

TMS320LC2406A, TMS320LC2404A, TMS320LC2403A, TMS320LC2402A

DSP CONTROLLERS

SPRS145K − JULY 2000 − REVISED AUGUST 2005

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

LPM2 wakeup timing

switching characteristics over recommended operating conditions (see Figure 33)

PARAMETER

MIN

MAX

UNIT

t ()

Delay time, PDPINTA low to PWM

if bit 6 of SCSR2 = 0

(6 + 1)tc(CO) + 12†

td(PDP-PWM)HZ

Delay time, PDPINTA low to PWM

high-impedance state

if bit 6 of SCSR2 = 1

(12+ 1)tc(CO) + 12†

td(INT)

Delay time, INT low/high to interrupt-vector

fetch

10tc(CO) + tw(PDP−WAKE)

† Includes i/p qualifier cycles plus synchronization plus propagation delay

timing requirements (see Figure 33)

MIN

MAX

UNIT

‡

Pulse duration PDPINTA input low

if bit 6 of SCSR2 = 0

6tc(CO)

tw(PDP−WAKE)‡

Pulse duration, PDPINTA input low

if bit 6 of SCSR2 = 1

12tc(CO)

PLL lock-up time

4096tc(CI)

cycles

‡ This is different from 240x devices.

PWM

PDPINTx

CLKOUT‡

tw(PDP−WAKE)

td(PDP-PWM)HZ

CPU Status

Interrupt Vector§ or

Next Instruction¶

td(INT)

XTAL1

Oscillator Disabled

CLKIN

tOSC†

CPU IDLE State (LPM2)

† tOSC is the oscillator start-up time.

‡ CLKOUT frequency after LPM2 wakeup will be the same as that upon entering LPM2 (x4 shown as an example).

§ PDPINTx interrupt vector, if PDPINTx interrupt is enabled.

¶ If PDPINTx interrupt is disabled.

Figure 33. LPM2 Wakeup Using PDPINTx

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