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TMS320LC2401AVFS датащи(PDF) 58 Page - Texas Instruments |
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TMS320LC2401AVFS датащи(HTML) 58 Page - Texas Instruments |
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58 / 134 page ![]() TMS320LF2407A,TMS320LF2406A,TMS320LF2403A,TMS320LF2402A TMS320LC2406A,TMS320LC2404A,TMS320LC2403A,TMS320LC2402A DSP CONTROLLERS SPRS145K − JULY 2000 − REVISED AUGUST 2005 58 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 PLL-based clock module (continued) XTAL2 XTAL1/CLKIN PLL XTAL OSC CLKOUT Fin 3-bit PLL Select (SCSR1.[11:9]) R1 C1 C2 PLLF RESONATOR/ CRYSTAL PLLF2 Cb1 Cb2 Figure 16. PLL Clock Module Block Diagram Table 9. PLL Clock Selection Through Bits (11−9) in SCSR1 Register CLK PS2 CLK PS1 CLK PS0 CLKOUT 0 0 0 4 × Fin 0 0 1 2 × Fin 0 1 0 1.33 × Fin 0 1 1 1 × Fin 1 0 0 0.8 × Fin 1 0 1 0.66 × Fin 1 1 0 0.57 × Fin 1 1 1 0.5 × Fin Default multiplication factor after reset is (1,1,1), i.e., 0.5 × Fin. NOTE: The bootloader sets the PLL to x2 or x4 option. If the bootloader is used, the value of CLKIN used should not force CLKOUT to exceed the maximum rated device speed. See the “Boot ROM” section for more details. external reference crystal clock option The internal oscillator is enabled by connecting a crystal across the XTAL1/CLKIN and XTAL2 pins as shown in Figure 17a. The crystal should be in fundamental operation and parallel resonant, with an effective series resistance of 30 Ω −150 Ω and draws no more than 1 mW; it should be specified at a load capacitance of 20 pF. NOTE: Lx240xA crystal biasing needs an external 1 M Ω resistor across X1 and X2 pins for reliable operation. See the TMS320LF2407A, LF2406A, LF2403A, LF2402A DSP Controllers Silicon Errata (literature number SPRZ002) or the TMS320LC2406A, TMS320LC2404A, TMS320LC2402A DSP Controllers Silicon Errata (literature number SPRZ185) for details on this requirement. external reference oscillator clock option The internal oscillator is disabled by connecting a clock signal to XTAL1/CLKIN and leaving the XTAL2 input pin unconnected as shown in part b of Figure 17. |
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