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TMS320LC2401AVFS датащи(PDF) 81 Page - Texas Instruments |
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TMS320LC2401AVFS датащи(HTML) 81 Page - Texas Instruments |
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81 / 134 page ![]() TMS320LF2407A, TMS320LF2406A, TMS320LF2403A, TMS320LF2402A TMS320LC2406A, TMS320LC2404A, TMS320LC2403A, TMS320LC2402A DSP CONTROLLERS SPRS145K − JULY 2000 − REVISED AUGUST 2005 81 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 RS timing timing requirements for a reset [H = 0.5tc(CO)] (see Figure 27 and Figure 28) MIN NOM MAX UNIT tw(RSL) Pulse duration, stable CLKIN to RS high 8tc(CI)† cycles tw(RSL2) Pulse duration, RS low 8tc(CI) cycles tp PLL lock-up time 4096tc(CI) cycles td(EX) Delay time, reset vector executed after PLL lock time 36H ns † During power-on reset, the device can continue to hold the RS pin low for another 128 CLKIN cycles. XTAL1 (See Note B) Address/ Data/ Control CLKOUT RS tw(RSL) tp td(EX) VDD/VDDO CLKIN BOOT_EN/XF tOSCST (See Note C) BOOT_EN I/Os XF Code-Dependent Address/Data/Control Valid Hi-Z (See Note D) NOTES: A. Be certain that the emulation logic is reset before de-asserting the device reset. That is, TRST of the device is not driven high before the device reset is de-asserted. This is applicable to XDS510 , XDS510PP, and XDS510PP+ class of emulators. New generation emulators such as SPI515 and XDS510 USB emulators have built-in protection mechanism to take care of this requirement. B. XTAL1 refers to the internal oscillator clock if on-chip oscillator is used. C. tOSCST is the oscillator start-up time, which is dependent on crystal/resonator and board design. D. All I/Os contain a clamp to VDD. Inputs of approximately 0.7 V above VDD will cause the I/O to sink current. I/Os containing pullups or pulldowns will always sink/source a small amount of current once powered. Figure 27. Power-on Reset (See Note A) XDS510PP+, SP515, and XDS510 USB are trademarks of Spectrum Digital. XDS510 and XDS510PP, are trademarks of Texas Instruments. |
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