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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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BQ76PL536APAPR датащи(PDF) 50 Page - Texas Instruments |
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BQ76PL536APAPR датащи(HTML) 50 Page - Texas Instruments |
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50 / 74 page  bq76PL536A SLUSAD3B – JUNE 2011 – REVISED JANUARY 2016 www.ti.com 7.6.24 FUNCTION_CONFIG Register (0x40) The FUNCTION_CONFIG sets the default configuration for special features of the device. Figure 47. FUNCTION_CONFIG Register 7 6 5 4 3 2 1 0 0 0 GPAI_REF GPAI_SRC CN[1] CN[0] Reserved Table 19. FUNCTION_CONFIG Register Field Descriptions Bit Field Type Reset Description 7-6 Reserved 5 GPAI_REF This bit sets the reference for the GPAI ADC measurement. 0 = Internal ADC bandgap reference 1 = VREG50 (ratiometric) 4 GPAI_SRC This bit controls multiplexing of the GPAI register and determines whether the ADC mux is connected to the external GPAI inputs, or internally to the BAT1 pin. The register results are automatically scaled to match the input. 0 = External GPAI inputs are converted to result in GPAI register 0x01–02. 1 = BAT pin to VSS voltage is measured and reported in the GPAI register. 3-2 CN[n] These two bits configure the number of series cells used. If fewer than 6 cells are configured, the corresponding OV/UV faults are ignored. For example, if the CN[x] bits are set to 10b (2), then the OV/UV comparators are ignored for cells 5 and 6. Refer to Table 20. 1-0 Reserved Table 20. Series Cells CN[1] CN[0] Series Cells 0 0 6 (DEFAULT) 0 1 5 1 0 4 1 1 3 50 Submit Documentation Feedback Copyright © 2011–2016, Texas Instruments Incorporated Product Folder Links: bq76PL536A |
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