BQ76PL536APAPR datasheet(41/74 Pages) TI1

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bq76PL536A

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SLUSAD3B – JUNE 2011 – REVISED JANUARY 2016

7.6.4 GPAI (0x01, 0x02) Register

The GPAI register reports the ADC measurement of GPAI+/GPAI– in units of LSBs.

Bits 15–8 are returned at address 0x01, bits 7–0 at address 0x02.

Figure 27. GPAI (0x01, 0x02) Register

GPAI[15]

GPAI[14]

GPAI[13]

GPAI[12]

GPAI[11]

GPAI[10]

GPAI[9]

GPAI[8]

GPAI [7]

GPAI [6]

GPAI [5]

GPAI [4]

GPAI [3]

GPAI [2]

GPAI [1]

GPAI [0]

7.6.5 VCELLn Register (0x03…0x0e)

The VCELLn registers report the converted data for cell n, where n = 1 to 6.

Bits 15–8 are returned at odd addresses (for example, 0x03), bits 7–0 at even addresses (for example, 0x04).

Figure 28. VCELLn Register

VCELLn[15]

VCELLn[14]

VCELLn[13]

VCELLn[12]

VCELLn[11]

VCELLn[10]

VCELLn[9]

VCELLn[8]

VCELLn[7]

VCELLn[6]

VCELLn[5]

VCELLn[4]

VCELLn[3]

VCELLn[2]

VCELLn[1]

VCELLn[0]

7.6.6 TEMPERATURE1 Register (0x0f, 0x10)

The TEMPERATURE1 register reports the converted data for TS1+ to TS1–.

Bits 15–8 are returned at odd addresses (for example, 0x0f), bits 7–0 at even addresses (for example, 0x10).

Figure 29. TEMPERATURE1 Register

TEMP1[15]

TEMP1[14]

TEMP1[13]

TEMP1[12]

TEMP1[11]

TEMP1[10]

TEMP1[9]

TEMP1[8]

TEMP1[7]

TEMP1[6]

TEMP1[5]

TEMP1[4]

TEMP1[3]

TEMP1[2]

TEMP1[1]

TEMP1[0]

7.6.7 TEMPERATURE2 Register (0x11, 0x12)

The TEMPERATURE2 register reports the converted data for TS2+ to TS2–.

Bits 15–8 are returned at odd addresses (for example, 0x11), bits 7–0 at even addresses (for example, 0x12).

Figure 30. TEMPERATURE2 Register

TEMP2[15]

TEMP2[14]

TEMP2[13]

TEMP2[12]

TEMP2[11]

TEMP2[10]

TEMP2[9]

TEMP2[8]

TEMP2[7]

TEMP2[6]

TEMP2[5]

TEMP2[4]

TEMP2[3]

TEMP2[2]

TEMP2[1]

TEMP2[0]

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