BQ76PL536APAPR datasheet(28/74 Pages) TI1

28 / 74 page

bq76PL536A

SLUSAD3B – JUNE 2011 – REVISED JANUARY 2016

www.ti.com

The 2.2-µF output capacitor is required whether REG50 is used in the design or not.

REG50 is disabled in SLEEP mode, and may be turned off under thermal-shutdown conditions, and therefore

should not be used as a pullup source for terminating device pins where required.

7.3.3.1.4

Auxiliary Power Output (AUX)

The bq76PL536A provides an approximately 1-mA auxiliary power output that is controlled through

IO_CONTROL[AUX]. This output is taken directly from REG50. The current drawn from this pin must be included

in the REG50 current-limit budget by the designer.

7.3.3.2 Undervoltage Lockout and Power-On Reset

The device incorporates two comparators to detect low VBAT conditions. The first detects low voltage where some

device digital operations are still available. The second, (POR) detects a voltage below which device operation is

not ensured.

7.3.3.2.1

UVLO

When the UVLO threshold voltage is sensed for a period

≥ UVLODELAY, the device is no longer able to make

accurate analog measurements and conversions. The ADC, cell-balancing and fault-detection circuitry are

disabled. The digital circuitry, including host CPU and vertical communications between ICs, is fully functional.

DEVICE_STATUS.

7.3.3.2.2

Power-On Reset (POR)

When the POR voltage threshold or lower is sensed for a period

≥ UVLODELAY, the device is no longer able to

function reliably. The device is disabled, including all fault-detection circuitry, host SPI communications, vertical

communications, and so forth.

After the voltage rises above the hysteresis limit longer than the delay time, the device exits the reset state, with

all registers set to default conditions. The FAULT_STATUS[POR] bit is set and latched until reset by the host.

The device no longer has a valid address (DEVICE_ADDRESS[AR] = 0, ADDRESS_CONTROL = 0). The device

should be reprogrammed with a valid address, and any registers re-written if non-default values are desired.

7.3.3.2.3

Reset Command

The bq76PL536A can also be reset by writing the reset code (0xa5) to the RESET register. All devices respond

to a broadcast RESET command regardless of their current assigned address. The result is identical to a POR

with the exception that the normal POR period is reduced to several hundred microseconds.

7.3.3.3 Thermal Shutdown (TSD)

The bq76PL536A contains an integrated thermal shutdown circuit whose sensor is located near the REG50 LDO

and has a threshold of TSD. When triggered, the REG50 regulator reduces its output voltage to zero, and the

ADC is turned off to conserve power. The thermal shutdown circuit has a built-in hysteresis that delays recovery

until the die has cooled slightly. When the thermal shutdown is active, the DEVICE_STATUS[TSD] bit is set. The

IO_CONTROL[SLEEP] and ALERT[SLEEP] bits also become set to reduce power consumption.

CAUTION

In the TSD state, the following are DISABLED:

•

REG50 and AUX outputs

•

Secondary protector settings

Due to the loss of REG50 and AUX outputs, any measurements (for example, voltage

on a thermistor biased by either) should be considered incorrect.

Any external protection schemes depending on either of these voltages will also be

impacted and the system designer shall make the appropriate decisions based on this.

Submit Documentation Feedback

Product Folder Links: bq76PL536A

BQ76PL536APAPR датащи(PDF) 28 Page - Texas Instruments

BQ76PL536APAPR датащи(HTML) 28 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

датащи скачать

ссылки URL