PIC16C71 datasheet(128/337 Pages) MICROCHIP

128 / 337 page

PIC16C6X

DS30234D-page 128

13.3

Reset

The PIC16CXX differentiates between various kinds of

reset:

• Power-on Reset (POR)

•MCLR reset during normal operation

• MCLR reset during SLEEP

• WDT Reset (normal operation)

• Brown-out Reset (BOR) - Not on PIC16C61/62/

64/65

Some registers are not affected in any reset condition,

their status is unknown on POR and unchanged in any

other reset. Most other registers are reset to a “reset

state” on Power-on Reset (POR), on MCLR or WDT

Reset, on MCLR reset during SLEEP, and on Brown-

out Reset (BOR). They are not affected by a WDT

Wake-up, which is viewed as the resumption of normal

operation.

Applicable Devices

61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67

The TO and PD bits are set or cleared differently in dif-

ferent reset situations as indicated in Table 13-7,

Table 13-8, and Table 13-9. These bits are used in soft-

ware to determine the nature of the reset. See

Table 13-12 for a full description of reset states of all

registers.

A simpliﬁed block diagram of the on-chip reset circuit is

shown in Figure 13-9.

the

PIC16C62A/R62/63/R63/64A/R64/65A/R65/

66/67, the MCLR reset path has a noise ﬁlter to detect

and ignore small pulses. See parameter #34 for pulse

width speciﬁcations.

It should be noted that a WDT Reset does not drive the

MCLR pin low.

FIGURE 13-9: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT

External Reset

MCLR/VPP pin

VDD pin

OSC1/

WDT

Module

VDD rise

detect

OST/PWRT

On-chip

RC OSC

WDT

Power-on Reset

OST

10-bit Ripple counter

PWRT

Chip Reset

10-bit Ripple counter

Time-out

Enable OST

Enable PWRT

SLEEP

Brown-out

Reset

BODEN

Note 1:

This is a separate oscillator from the RC oscillator of the CLKIN pin.

Brown-out Reset is NOT implemented on the PIC16C61/62/64/65.

See Table 13-5 and Table 13-6 for time-out situations.

(2)

(1)

CLKIN

(3)

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