PIC16C71 datasheet(73/337 Pages) MICROCHIP

73 / 337 page

DS30234D-page 73

PIC16C6X

8.3

Timer1 Operation in Asynchronous

Counter Mode

If control bit T1SYNC (T1CON<2>) is set, the external

clock input is not synchronized. The timer continues to

increment asynchronous to the internal phase clocks.

The timer will continue to run during SLEEP and gener-

ate an interrupt on overﬂow which will wake the proces-

sor. However, special precautions in software are

needed to read-from or write-to the Timer1 register

pair, TMR1L and TMR1H (Section 8.3.2).

In asynchronous counter mode, Timer1 cannot be used

as a time-base for capture or compare operations.

8.3.1

EXTERNAL CLOCK INPUT TIMING WITH

UNSYNCHRONIZED CLOCK

If control bit T1SYNC is set, the timer will increment

completely asynchronously. The input clock must meet

certain minimum high time and low time requirements,

as speciﬁed in timing parameters (45 - 47).

8.3.2

READING AND WRITING TMR1 IN

ASYNCHRONOUS COUNTER MODE

Reading TMR1H or TMR1L, while the timer is running

from an external asynchronous clock, will ensure a

valid read (taken care of in hardware). However, the

user should keep in mind that reading the 16-bit timer

in two 8-bit values itself poses certain problems since

the timer may overﬂow between the reads.

For writes, it is recommended that the user simply stop

the timer and write the desired values. A write conten-

tion may occur by writing to the timer registers while the

dictable value in the timer register.

Reading

the

16-bit

value

requires

some

care.

Example 8-1 is an example routine to read the 16-bit

timer value. This is useful if the timer cannot be

stopped.

Applicable Devices

61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67

EXAMPLE 8-1:

READING A 16-BIT

FREE-RUNNING TIMER

;

All Interrupts are disabled

MOVF

TMR1H,

;Read high byte

MOVWF

TMPH

;

MOVF

TMR1L,

;Read low byte

MOVWF

TMPL

;

MOVF

TMR1H,

;Read high byte

SUBWF

TMPH,

;Sub 1st read

;with 2nd read

BTFSC

STATUS,Z

;is result = 0

GOTO

CONTINUE

;Good 16-bit read

; TMR1L may have rolled over between the read

; of the high and low bytes. Reading the high

; and low bytes now will read a good value.

MOVF

TMR1H,

;Read high byte

MOVWF

TMPH

;

MOVF

TMR1L,

;Read low byte

MOVWF

TMPL

;

Re-enable Interrupt (if required)

CONTINUE

;Continue with

;your code

8.4

Timer1 Oscillator

A crystal oscillator circuit is built in-between pins T1OSI

(input) and T1OSO (ampliﬁer output). It is enabled by

setting control bit T1OSCEN (T1CON<3>). The oscilla-

tor is a low power oscillator rated up to 200 kHz. It will

continue to run during SLEEP. It is primarily intended

for a 32 kHz crystal. Table 8-1 shows the capacitor

selection for the Timer1 oscillator.

The Timer1 oscillator is identical to the LP oscillator.

The user must allow a software time delay to ensure

proper oscillator start-up.

TABLE 8-1:

CAPACITOR SELECTION

FOR THE TIMER1

OSCILLATOR

Applicable Devices

61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67

Osc Type

Freq

32 kHz

33 pF

100 kHz

15 pF

200 kHz

15 pF

These values are for design guidance only.

Crystals Tested:

32.768 kHz

Epson C-001R32.768K-A

± 20 PPM

100 kHz

Epson C-2 100.00 KC-P

± 20 PPM

200 kHz

STD XTL 200.000 kHz

± 20 PPM

Note 1: Higher capacitance increases the stability

of oscillator but also increases the start-up

time.

2: Since each resonator/crystal has its own

characteristics, the user should consult the

resonator/crystal manufacturer for appropri-

ate values of external components.

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