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PIC16C71 датащи(PDF) 82 Page - Microchip Technology |
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PIC16C71 датащи(HTML) 82 Page - Microchip Technology |
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82 / 337 page ![]() PIC16C6X DS30234D-page 82 © 1997 Microchip Technology Inc. TABLE 10-5: REGISTERS ASSOCIATED WITH PWM AND TIMER2 Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on: POR, BOR Value on all other Resets 0Bh,8Bh 10Bh,18Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u 0Ch PIR1 PSPIF(2) (3) RCIF(1) TXIF(1) SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 0Dh(4) PIR2 — — — — — — — CCP2IF ---- ---0 ---- ---0 8Ch PIE1 PSPIE(2) (3) RCIE(1) TXIE(1) SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 8Dh(4) PIE2 — — — — — — — CCP2IE ---- ---0 ---- ---0 87h TRISC PORTC Data Direction register 1111 1111 1111 1111 11h TMR2 Timer2 module’s register 0000 0000 0000 0000 92h PR2 Timer2 module’s Period register 1111 1111 1111 1111 12h T2CON — TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000 15h CCPR1L Capture/Compare/PWM1 (LSB) xxxx xxxx uuuu uuuu 16h CCPR1H Capture/Compare/PWM1 (MSB) xxxx xxxx uuuu uuuu 17h CCP1CON — — CCP1X CCP1Y CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000 1Bh(4) CCPR2L Capture/Compare/PWM2 (LSB) xxxx xxxx uuuu uuuu 1Ch(4) CCPR2H Capture/Compare/PWM2 (MSB) xxxx xxxx uuuu uuuu 1Dh(4) CCP2CON — — CCP2X CCP2Y CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000 --00 0000 Legend: x = unknown, u = unchanged, - = unimplemented locations read as '0’. Shaded cells are not used in this mode. Note 1: These bits are associated with the USART module, which is implemented on the PIC16C63/R63/65/65A/R65/66/67 only. 2: Bits PSPIE and PSPIF are reserved on the PIC16C62/62A/R62/63/R63/66, always maintain these bits clear. 3: The PIR1<6> and PIE1<6> bits are reserved, always maintain these bits clear. 4: These registers are associated with the CCP2 module, which is only implemented on the PIC16C63/R63/65/65A/R65/66/67. |
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