PIC16C71 datasheet(57/337 Pages) MICROCHIP

57 / 337 page

DS30234D-page 57

PIC16C6X

5.4

PORTD and TRISD Register

PORTD is an 8-bit port with Schmitt Trigger input buff-

ers. Each pin is individually conﬁgurable as input or out-

put.

PORTD can be conﬁgured as an 8-bit wide micropro-

cessor port (parallel slave port) by setting control bit

PSPMODE (TRISE<4>). In this mode, the input buffers

are TTL.

Applicable Devices

61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67

FIGURE 5-7:

PORTD BLOCK DIAGRAM

(IN I/O PORT MODE)

Data

bus

PORT

TRIS

RD PORT

Data Latch

TRIS Latch

RD TRIS

Schmitt

Trigger

input

buffer

I/O pin(1)

Note 1: I/O pins have protection diodes to VDD and VSS.

TABLE 5-9:

PORTD FUNCTIONS

TABLE 5-10:

SUMMARY OF REGISTERS ASSOCIATED WITH PORTD

Name

Bit#

Buffer Type

Function

RD0/PSP0

bit0

ST/TTL(1)

Input/output port pin or parallel slave port bit0

RD1/PSP1

bit1

ST/TTL(1)

Input/output port pin or parallel slave port bit1

RD2/PSP2

bit2

ST/TTL(1)

Input/output port pin or parallel slave port bit2

RD3/PSP3

bit3

ST/TTL(1)

Input/output port pin or parallel slave port bit3

RD4/PSP4

bit4

ST/TTL(1)

Input/output port pin or parallel slave port bit4

RD5/PSP5

bit5

ST/TTL(1)

Input/output port pin or parallel slave port bit5

RD6/PSP6

bit6

ST/TTL(1)

Input/output port pin or parallel slave port bit6

RD7/PSP7

bit7

ST/TTL(1)

Input/output port pin or parallel slave port bit7

Legend: ST = Schmitt Trigger input, TTL = TTL input

Note 1: Buffer is a Schmitt Trigger when in I/O mode, and a TTL buffer when in Parallel Slave Port mode.

Address Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on:

POR,

BOR

Value on all

other resets

08h

PORTD

RD7

RD6

RD5

RD4

RD3

RD2

RD1

RD0

xxxx xxxx

uuuu uuuu

88h

TRISD

PORTD Data Direction Register

1111 1111

89h

TRISE

IBF

OBF

IBOV

PSPMODE

—

PORTE Data Direction Bits

0000 -111

Legend: x = unknown, u = unchanged, - = unimplemented locations read as '0'. Shaded cells are not used by PORTD.

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